MBM29F080A-55PF SPANSION [SPANSION], MBM29F080A-55PF Datasheet - Page 14

• Manufacturer Part Number: MBM29F080A-55PF
• Description: FLASH MEMORY CMOS 8M (1M x 8) BIT
• Manufacturer: SPANSION [SPANSION]

Command Definitions
Read/Reset Command
Autoselect Command
Byte Programming
groups will be protected again. Refer to “Temporary Sector Group Unprotection Timing Diagram” in “ TIMING
DIAGRAM” and “Temporary Sector Group Unprotection Algorithm” in “ FLOW CHART”.
Device operations are selected by writing specific address and data sequences into the command register.
Writing incorrect address and data values or writing them in the improper sequence will reset the device to the
read mode. “MBM29F080A Command Definitions Table” in “ FLEXIBLE SECTOR-ERASE ARCHITECTURE”
defines the valid register command sequences. Note that the Erase Suspend (B0h) and Erase Resume (30h)
commands are valid only while the Sector Erase operation is in progress. Moreover, both Read/Reset commands
are functionally equivalent, resetting the device to the read mode.
The read or reset operation is initiated by writing the read/reset command sequence into the command register.
Microprocessor read cycles retrieve array data from the memory. The device remains enabled for reads until the
command register contents are altered.
The device will automatically power-up in the read/reset state. In this case, a command sequence is not required
to read data. Standard microprocessor read cycles will retrieve array data. This default value ensures that no
spurious alteration of the memory content occurs during the power transition. Refer to the AC Read
Characteristics and Waveforms for the specific timing parameters.
Flash memories are intended for use in applications where the local CPU alters memory contents. As such,
manufacture and device codes must be accessible while the device resides in the target system. PROM
programmers typically access the signature codes by raising A
voltage onto the address lines is not generally desirable system design practice.
The device contains an autoselect command operation to supplement traditional PROM programming
methodology. The operation is initiated by writing the autoselect command sequence into the command register.
Following the command write, a read cycle from address XX00h retrieves the manufacture code of 04h. A read
cycle from address XX01h returns the device code D5h. (See “MBM29F080A Sector Protection Verify Autoselect
Codes Table” in “ FLEXIBLE SECTOR-ERASE ARCHITECTURE”).
All manufacturer and device codes will exhibit odd parity with the DQ
Sector state (protection or unprotection) will be informed by address XX02h.
Scanning the sector group addresses (A
device output DQ
To terminate the operation, it is necessary to write the read/reset command sequence into the register and also
to write the Autoselect command during the operation, execute it after writing Read/Reset command sequence.
The device is programmed on a byte-by-byte basis. Programming is a four bus cycle operation. There are two
“unlock” write cycles. These are followed by the program set-up command and data write cycles. Addresses are
latched on the falling edge of CE or WE, whichever happens later and the data is latched on the rising edge of
CE or WE, whichever happens first. The rising edge of CE or WE (whichever happens first) begins programming.
Upon executing the Embedded Program Algorithm command sequence, the system is not required to provide
further controls or timings. The device will automatically provide adequate internally generated program pulses
and verify the programmed cell margin.
0
for a protected sector group.
17
, A
18
, A
19
) while (A
6
, A
9
1
to a high voltage. However, multiplexing high
, A
MBM29F080A
0
) = (0, 1, 0) will produce a logical “1” at
7
defined as the parity bit.
-55/-70/-90
13