MBM29F080A-55PF SPANSION [SPANSION], MBM29F080A-55PF Datasheet - Page 2

• Manufacturer Part Number: MBM29F080A-55PF
• Description: FLASH MEMORY CMOS 8M (1M x 8) BIT
• Manufacturer: SPANSION [SPANSION]

FUJITSU SEMICONDUCTOR
FLASH MEMORY
CMOS
8M (1M
MBM29F080A
Ordering Part No.
Max Address Access Time (ns)
Max CE Access Time (ns)
Max OE Access Time (ns)
GENERAL DESCRIPTION
The MBM29F080A is a 8 M-bit, 5.0 V-Only Flash memory organized as 1 M bytes of 8 bits each. The 1 M bytes
of data is divided into 16 sectors of 64 K bytes for flexible erase capability. The 8 bit of data will appear on DQ
to DQ
is designed to be programmed in-system with the standard system 5.0 V V
for program or erase operations. The device can also be reprogrammed in standard EPROM programmers.
The standard MBM29F080A offers access times between 55 ns and 90 ns allowing operation of high-speed
microprocessors without wait states. To eliminate bus contention the device has separate chip enable (CE), write
enable (WE), and output enable (OE) controls.
The MBM29F080A is command set compatible with JEDEC standard E
command register using standard microprocessor write timings. Register contents serve as input to an internal
state-machine which controls the erase and programming circuitry. Write cycles also internally latch addresses
and data needed for the programming and erase operations. Reading data out of the device is similar to reading
from 12.0 V Flash or EPROM devices.
The MBM29F080A is programmed by executing the program command sequence. This will invoke the Embedded
Program Algorithm which is an internal algorithm that automatically times the program pulse widths and verifies
proper cell margin. Each sector can be programmed and verified in less than 0.5 seconds. Erase is accomplished
by executing the erase command sequence. This will invoke the Embedded Erase Algorithm which is an internal
algorithm that automatically preprograms the array if it is not already programmed before executing the erase
operation. During erase, the device automatically times the erase pulse widths and verifies proper cell margin.
PRODUCT LINE UP
DATA SHEET
7
. The MBM29F080A is offered in a 48-pin TSOP(I), 40-pin TSOP , and 44-pin SOP packages. This device
Part No.
V
V
CC
CC
= 5.0 V ±5%
= 5.0 V ±10%
-55/-70/-90
8) BIT
-55
55
30
—
55
MBM29F080A
2
PROMs. Commands are written to the
CC
-70
70
70
30
—
supply. A 12.0 V V
DS05-20850-4E
PP
is not required
-90
90
90
40
—
(Continued)
0