MBM29F080A-55PF SPANSION [SPANSION], MBM29F080A-55PF Datasheet - Page 15

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MBM29F080A-55PF

Manufacturer Part Number
MBM29F080A-55PF
Description
FLASH MEMORY CMOS 8M (1M x 8) BIT
Manufacturer
SPANSION [SPANSION]
Datasheet
14
MBM29F080A
Chip Erase
Sector Erase
This automatic programming operation is completed when the data on DQ
bit at which time the device returns to the read mode and addresses are no longer latched. (See “Hardware
Sequence Flags Table” in “ FLEXIBLE SECTOR-ERASE ARCHITECTURE”.) Therefore, the device requires
that a valid address to the device be supplied by the system at this particular instance of time. Data Polling must
be performed at the memory location which is being programmed.
Any commands written to the chip during this period will be ignored. If a hardware reset occurs during the
programming operation, it is impossible to guarantee the data are being written.
Programming is allowed in any sequence and across sector boundaries. Beware that a data “0” cannot be
programmed back to a “1”. Attempting to do so may either hang up the device or result in an apparent success
according to the data polling algorithm but a read from reset/read mode will show that the data is still “0”. Only
erase operations can convert “0”s to “1”s.
“Embedded Program
using typical command strings and bus operations.
Chip erase is a six bus cycle operation. There are two “unlock” write cycles. These are followed by writing the
“set-up” command. Two more “unlock” write cycles are then followed by the chip erase command.
Chip erase does not require the user to program the device prior to erase. Upon executing the Embedded Erase
Algorithm command sequence the device will automatically program and verify the entire memory for an all zero
data pattern prior to electrical erase. The system is not required to provide any controls or timings during these
operations.
The automatic erase begins on the rising edge of the last WE pulse in the command sequence and terminates
when the data on DQ
mode.
“Embedded Erase
command strings and bus operations.
Sector erase is a six bus cycle operation. There are two “unlock” write cycles. These are followed by writing the
“set-up” command. Two more “unlock” write cycles are then followed by the Sector Erase command. The sector
address (any address location within the desired sector) is latched on the falling edge of WE, while the command
(Data = 30h) is latched on the rising edge of WE. After time-out of 50 s from the rising edge of the last sector
erase command, the sector erase operation will begin.
Multiple sectors may be erased concurrently by writing the six bus cycle operations on “MBM29F080A Command
Definitions Table” in “ FLEXIBLE SECTOR-ERASE ARCHITECTURE”. This sequence is followed with writes
of the Sector Erase command to addresses in other sectors desired to be concurrently erased. The time between
writes must be less than 50 s otherwise that command will not be accepted and erasure will start. It is
recommended that processor interrupts be disabled during this time to guarantee this condition. The interrupts
can be re-enabled after the last Sector Erase command is written. A time-out of 50 s from the rising edge of
the last WE will initiate the execution of the Sector Erase command(s). If another falling edge of the WE occurs
within the 50 s time-out window the timer is reset. (Monitor DQ
is still open, see section DQ
during this time-out period will reset the device to the read mode, ignoring the previous command string. Resetting
the device once execution has begun will corrupt the data in that sector. In that case, restart the erase on those
sectors and allow them to complete. (Refer to the Write Operation Status section for DQ
operation.) Loading the sector erase buffer may be done in any sequence and with any number of sectors (0 to 15).
TM
Algorithm” in “ FLOW CHART” illustrates the Embedded Erase™ Algorithm using typical
TM
7
is “1” (see Write Operation Status section) at which time the device returns to read the
Algorithm” in “ FLOW CHART” illustrates the Embedded Programming
-55/-70/-90
3
, Sector Erase Timer.) Any command other than Sector Erase or Erase Suspend
3
to determine if the sector erase timer window
7
is equivalent to data written to this
3
, Sector Erase Timer
TM
Algorithm

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