MBM29F080A-55PF SPANSION [SPANSION], MBM29F080A-55PF Datasheet - Page 17

• Manufacturer Part Number: MBM29F080A-55PF
• Description: FLASH MEMORY CMOS 8M (1M x 8) BIT
• Manufacturer: SPANSION [SPANSION]

16
MBM29F080A
Write Operation Status
*1 : Performing successive read operations from the erase-suspended sector will cause DQ
*2 : Performing successive read operations from any address will cause DQ
*3 : Reading the byte address being programmed while in the erase-suspend program mode will indicate logic “1”
DQ
Data Polling
In Progress
Exceeded
Time Limits
The MBM29F080A device features Data Polling as a method to indicate to the host that the embedded algorithms
are in progress or completed. During the Embedded Program Algorithm, an attempt to read the device will
produce the complement of the data last written to DQ
an attempt to read the device will produce the true data last written to DQ
Algorithm, an attempt to read the device will produce a “0” at the DQ
Erase Algorithm an attempt to read the device will produce a “1” at the DQ
(DQ
Data polling will also flag the entry into Erase Suspend. DQ
mode. Please note that the address of an erasing sector must be applied in order to observe DQ
Suspend Mode.
During Program in Erase Suspend, Data polling will perform the same as in regular program execution outside
of the suspend mode.
For chip erase, the Data Polling is valid after the rising edge of the sixth WE pulse in the six write pulse sequence.
For sector erase, the Data Polling is valid after the last rising edge of the sector erase WE pulse. Data Polling
must be performed at sector address within any of the sectors being erased and not a sector that is within a
protected sector group. Otherwise, the status may not be valid.
Just prior to the completion of Embedded Algorithm operation DQ
enable (OE) is asserted low. This means that the device is driving status information on DQ
time and then that byte's valid data at the next instant of time. Depending on when the system samples the DQ
output, it may read the status or valid data. Even if the device has completed the Embedded Algorithm operations
and DQ
be read on the successive read attempts.
at the DQ
7
7
) is shown in “Data Polling Algorithm” in “ FLOW CHART”.
7
has a valid data, the data outputs on DQ
2
bit. However, successive reads from the erase-suspended sector will cause DQ
Embedded Program Algorithm
Embedded Erase Algorithm
Erase Sus-
pended
Mode
Embedded Program Algorithm
Embedded Erase Algorithm
Erase
Suspended
Mode
Status
Erase Suspend Read
(Erase Suspended Sector)
Erase Suspend Read
(Non-Erase Suspended Sector)
Erase Suspend Program
(Non-Erase Suspended Sector)
Erase Suspend Program
(Non-Erase Suspended Sector)
-55/-70/-90
0
to DQ
7
. Upon completion of the Embedded Program Algorithm,
6
7
may be still invalid. The valid data on DQ
will switch “0” to “1” at the start of the Erase Suspend
Data
DQ
DQ
DQ
DQ
DQ
0
1
0
7
may change asynchronously while the output
7
7
7
7
7
7
output. Upon completion of the Embedded
Toggle*
Toggle
Toggle
Toggle
Toggle
Toggle
7
Data
DQ
6
output. The flowchart for Data Polling
7
to toggle.
1
. During the Embedded Erase™
6
2
Data
DQ
0
1
0
0
0
1
1
5
2
to toggle.
2
Data
7
DQ
to toggle.
at one instant of
0
1
0
0
0
1
0
3
7
in the Erase
0
to DQ
Toggle*
Toggle
Data
DQ
N/A
N/A
1*
1
1
3
7
2
will
1
7