PCF8811MU/2DA/1 PHILIPS [NXP Semiconductors], PCF8811MU/2DA/1 Datasheet - Page 57

• Manufacturer Part Number: PCF8811MU/2DA/1
• Description: 80 x 128 pixels matrix LCD driver
• Manufacturer: PHILIPS [NXP Semiconductors]

Philips Semiconductors
22.5
These instructions are in addition to those indicated in Table 5.
Table 24 Additional instructions; note 1
Note
1. X = don’t care.
22.5.1
This instruction puts the device in calibration mode. This mode enables the shift register for loading and allows
programming of the non-volatile OTP cells to take place. If the seal bit is set then this mode cannot be accessed and the
instruction will be ignored. Once in calibration mode all commands are interpreted as shift register data. The mode can
only be exited by sending data with bit D7 set to logic 0. Reset will also clear this mode. Each shift register data byte is
preceded by D/C = 0 and has only 2 significant bits, thus the remaining 6 bits are ignored. Bit D7 is the continuation bit
(D7 = 1 remain in CALMM mode, D7 = 0 exit CALMM mode). Bit D0 is the data bit and its value is shifted into the OTP
shift register (on the falling edge of SCLK).
2004 May 17
handbook, full pagewidth
CALMM
Power control
(‘Refresh’)
80
NAME
Interface commands
CALMM
128 pixels matrix LCD driver
read data
OTP cell
from the
EXT
REGISTER
FLIP-FLOP
OTP CELL
OTP slice
X
X
SHIFT
D/C
write data
to the
OTP cell
0
0
R/W
0
0
REGISTER
INPUT
SHIFT
DATA
D7
1
0
Fig.48 Basic OTP architecture.
D6
0
0
D5
0
1
CONFIGURATION AND CALIBRATION
COMMAND BYTE
57
DATA TO THE CIRCUIT FOR
D4
0
0
D3
0
1
PC1
D2
0
PC0
D1
1
D0
0
1
enter CALMM mode
switch HVgen on/off
to force a refresh of
the shift register
Product specification
SHIFT
REGISTER
OTP CELLs
PCF8811
ACTION
MGU289