PCF8811MU/2DA/1 PHILIPS [NXP Semiconductors], PCF8811MU/2DA/1 Datasheet - Page 7

• Manufacturer Part Number: PCF8811MU/2DA/1
• Description: 80 x 128 pixels matrix LCD driver
• Manufacturer: PHILIPS [NXP Semiconductors]

Philips Semiconductors
7.10
These 5 input pins enable the calibration of the
programmed V
V
7.11
Input to select the basic command set or the extended
command set. Must be connected on the module to have
only one command set enabled.
Table 1 Command set
Note: Philips strongly recommends that the extended
command set be used.
7.12
Parallel/serial/I
Table 2 Interface selection
7.13
Input to select either command/data or data input. Not
used in the 3-line serial interface, 3-line SPI and I
interface and must be connected to V
7.14
Input to select read or write mode when the 6800 parallel
interface is selected. Not used in the serial and I
mode and must be connected to V
7.15
E is the clock enable input for the 6800 parallel bus. Not
used in the serial or I
connected to V
2004 May 17
EXT
000
001
010
011
100 or 110
101 or 111
DD1
80
PIN
or V
V
EXT: extended command set
PS0, PS1 and PS2
D/C
R/W
E
OS4
SS1
128 pixels matrix LCD driver
PS[2:0]
to V
).
2
LCD
DD1
C-bus interface selection.
OS0
LEVEL
HIGH
(can be connected on the module to
LOW
or V
2
C-bus interface and must be
SS1
.
basis command set
extended command set
3-line SPI
4-line SPI
no operation
6800 parallel interface
high-speed I
interface
3-line serial interface
DD1
DESCRIPTION
INTERFACE
DD1
or V
or V
2
SS1
C-bus
SS1
.
2
.
C-bus
2
C-bus
7
7.16
Input to select the chip and so allowing data/commands to
be clocked in or serial clock input when the I
interface is selected.
7.17
I
connected to V
7.18
SDAHOUT is the serial data acknowledge output for the
I
externally, the SDAH line becomes fully I
compatible. Having the acknowledge output separated
from the serial data line is advantageous in COG
applications. In COG applications where the track
resistance from the SDAHOUT pad to the system SDAH
line can be significant, a potential divider is generated by
the bus pull-up resistor and the ITO track resistance. It is
possible that during the acknowledge cycle the PCF8811
will not be able to create a valid logic 0 level. By splitting
the SDAH input from the SDAHOUT output the device
could be used in a mode that ignores the acknowledge bit.
In COG applications where the acknowledge cycle is
required, it is necessary to minimize the track resistance
from the SDAHOUT pad to the system SDAH line to
guarantee a valid low level. When not used it must be
connected to V
7.19
These input/output lines are used by the several interfaces
as described below. When not used in the serial interface
or the I
V
7.19.1
8-bit bidirectional bus. DB7 is the MSB.
7.19.2
DB7 is used for serial input data (SDATA) when the serial
interface is selected. DB6 (SCLK) is used for the serial
input clock when the serial interface is selected. DB5 is
used as the serial output of the serial interface (SDO).
7.19.3
DB3 and DB2 are respectively the SA1 and SA0 inputs
when the I
that up to four PCF8811s can be distinguished on one
I
2
2
2
C-bus serial data input. When not used it must be
C-bus interface. By connecting SDAHOUT to SDAH
SS1
C-bus interface.
.
SCLH/SCE
SDAH
SDAHOUT
DB7 to DB0
2
C-bus interface it must be connected to V
DB7
DB7, DB6
DB3
2
C-bus interface is selected and can be used so
TO
AND
DD1
DD1
DB0 (
DB2 (I
and V
or V
AND
PARALLEL INTERFACE
SS1
DB5 (
SS1
2
C-
.
.
BUS INTERFACE
SERIAL INTERFACE
Product specification
PCF8811
2
C-bus
)
)
2
C-bus
)
DD1
or