PCF8811MU/2DA/1 PHILIPS [NXP Semiconductors], PCF8811MU/2DA/1 Datasheet - Page 8

• Manufacturer Part Number: PCF8811MU/2DA/1
• Description: 80 x 128 pixels matrix LCD driver
• Manufacturer: PHILIPS [NXP Semiconductors]

Philips Semiconductors
7.20
When the on-chip oscillator is used this input must be
connected to V
connected to this input. If the oscillator and external clock
are both inhibited by connecting the OSC pin to V
display is not clocked and may be left in a DC state. To
avoid this the chip should always be put into Power-down
mode before stopping the clock.
7.21
This signal will reset the device and must be applied to
properly initialize the chip. The signal is active LOW.
8
8.1
The on-chip oscillator provides the clock signal for the
display system. No external components are required and
the OSC input must be connected to V
clock signal, if used, is connected to this input.
8.2
The address counter assigns addresses to the display
data RAM for writing. The X address X[6:0] and the
Y address Y[3:0] are set separately.
8.3
The PCF8811 contains an 80
stores the display data. The RAM is divided into 10 banks
of 128 bytes (10
enabled is always ROW 79 and therefore located in
bank 9. During RAM access, data is transferred to the
RAM via the parallel, serial interface or I
There is a direct correspondence between the X address
and the column output number.
2004 May 17
80
BLOCK DIAGRAM FUNCTIONS
OSC: oscillator
RES: reset
Oscillator
Address Counter (AC)
Display Data RAM (DDRAM)
128 pixels matrix LCD driver
DD1
. An external clock signal, if used, is
8
128 bits). The icon row when
128-bit static RAM which
DD1
2
C-bus interface.
. An external
SS1
, the
8
8.4
The timing generator produces the various signals
required to drive the internal circuitry. Internal chip
operation is not affected by operations on the data bus.
8.5
The display is generated by simultaneously reading out
the RAM content for 2, 4 or 8 rows depending on the
selected current display size. This content will be
processed with the corresponding set of 2, 4 or 8
orthogonal functions and so generating the signals for
switching the pixels in the display on or off according to the
RAM content. The possibility exists to set the p value for
the display sizes 64 and 80 manually to p = 4.
The display status (all dots on/off and normal/inverse
video) is set by the bits DON, DAL and E in the command
display control; see Table 6.
8.6
The PCF8811 contains 80 row and 128 column drivers,
which connect the appropriate LCD bias voltages in
sequence to the display in accordance with the data to be
displayed.
Timing generator
Display address counter
LCD row and column drivers
Product specification
PCF8811