ADV7170SU AD [Analog Devices], ADV7170SU Datasheet - Page 18

• Manufacturer Part Number: ADV7170SU
• Manufacturer: AD [Analog Devices]

ADV7170/ADV7171
Mode 1: Master Option HSYNC, BLANK, FIELD
(Timing Register 0 TR0 = X X X X X 0 1 1)
In this mode the ADV7170/ADV7171 can generate horizontal SYNC and Odd/Even FIELD signals. A transition of the FIELD
input when HSYNC is low indicates a new frame, i.e., vertical retrace. The BLANK signal is optional. When the BLANK input is
disabled, the ADV7170/ADV7171 automatically blanks all normally blank lines as per CCIR-624. Pixel data is latched on the rising
clock edge following the timing signal transitions. Mode 1 is illustrated in Figure 24 (NTSC) and Figure 25 (PAL). Figure 26 illus-
trates the HSYNC, BLANK and FIELD for an odd or even field transition relative to the pixel data.
Mode 2: Slave Option HSYNC, VSYNC, BLANK
(Timing Register 0 TR0 = X X X X X 1 0 0)
In this mode the ADV7170/ADV7171 accepts horizontal and vertical SYNC signals. A coincident low transition of both HSYNC and
VSYNC inputs indicates the start of an odd field. A VSYNC low transition when HSYNC is high indicates the start of an even field.
The BLANK signal is optional. When the BLANK input is disabled, the ADV7170/ADV7171 automatically blanks all normally
blank lines as per CCIR-624. Mode 2 is illustrated in Figure 27 (NTSC) and Figure 28 (PAL).
HSYNC
BLANK
HSYNC
VSYNC
BLANK
VSYNC
522
DISPLAY
DISPLAY
260
523
261
HSYNC
BLANK
FIELD
PIXEL
DATA
524
262
Figure 26. Timing Mode 1 Odd/Even Field Transitions Master/Slave
525
263
NTSC = 16 * CLOCK/2
PAL = 12 * CLOCK/2
1
264
ODD FIELD
EVEN FIELD
2
265
Figure 27. Timing Mode 2 (NTSC)
3
266
4
267
5
VERTICAL BLANK
268
–18–
VERTICAL BLANK
6
269
EVEN FIELD
ODD FIELD
7
270
8
271
PAL = 132 * CLOCK/2
NTSC = 122 * CLOCK/2
9
272
10
273
Cb
11
274
Y
Cr
Y
20
283
21
284
DISPLAY
DISPLAY
22
285
REV. 0