ADV7170SU AD [Analog Devices], ADV7170SU Datasheet - Page 30

• Manufacturer Part Number: ADV7170SU
• Manufacturer: AD [Analog Devices]

ADV7170/ADV7171
The ADV7170/ADV7171 is a highly integrated circuit containing
both precision analog and high speed digital circuitry. It has
been designed to minimize interference effects on the integrity
of the analog circuitry by the high speed digital circuitry. It is
imperative that these same design and layout techniques be
applied to the system level design so that high speed, accurate
performance is achieved. Figure 54, Recommended Analog
Circuit Layout, shows the analog interface between the device
and monitor.
The layout should be optimized for lowest noise on the ADV7170/
ADV7171 power and ground lines by shielding the digital inputs
and providing good decoupling. The lead length between groups
of V
tive ringing.
Ground Planes
The ground plane should encompass all ADV7170/ADV7171
ground pins, voltage reference circuitry, power supply bypass
circuitry for the ADV7170/ADV7171, the analog output traces,
and all the digital signal traces leading up to the ADV7170/
ADV7171. The ground plane is the board’s common ground
plane.
This should be as substantial as possible to maximize heat
spreading and power dissipation on the board.
Power Planes
The ADV7170/ADV7171 and any associated analog circuitry
should have its own power plane, referred to as the analog
power plane (V
the regular PCB power plane (V
ferrite bead. This bead should be located within three inches of
the ADV7170/ADV7171.
The metallization gap separating device power plane and board
power plane should be as narrow as possible to minimize the
obstruction to the flow of heat from the device into the general
board.
The PCB power plane should provide power to all digital logic
on the PC board, and the analog power plane should provide
power to all ADV7170/ADV7171 power pins and voltage refer-
ence circuitry.
Plane-to-plane noise coupling can be reduced by ensuring that
portions of the regular PCB power and ground planes do not
overlay portions of the analog power plane unless they can be
arranged so that the plane-to-plane noise is common-mode.
AA
and GND pins should by minimized to minimize induc-
AA
). This power plane should be connected to
CC
) at a single point through a
BOARD DESIGN AND LAYOUT CONSIDERATIONS
APPENDIX 1
–30–
Supply Decoupling
For optimum performance, bypass capacitors should be in-
stalled using the shortest leads possible, consistent with reliable
operation, to reduce the lead inductance. Best performance is
obtained with 0.1 F ceramic capacitor decoupling. Each group
of V
0.1 F decoupling capacitor to GND. These capacitors should
be placed as close to the device as possible.
It is important to note that while the ADV7170/ADV7171 con-
tains circuitry to reject power supply noise, this rejection de-
creases with frequency. If a high frequency switching power
supply is used, the designer should pay close attention to reduc-
ing power supply noise and consider using a three-terminal voltage
regulator for supplying power to the analog power plane.
Digital Signal Interconnect
The digital inputs to the ADV7170/ADV7171 should be iso-
lated as much as possible from the analog outputs and other
analog circuitry. Also, these input signals should not overlay the
analog power plane.
Due to the high clock rates involved, long clock lines to the
ADV7170/ADV7171 should be avoided to reduce noise pickup.
Any active termination resistors for the digital inputs should be
connected to the regular PCB power plane (V
analog power plane.
Analog Signal Interconnect
The ADV7170/ADV7171 should be located as close to the
output connectors as possible to minimize noise pickup and
reflections due to impedance mismatch.
The video output signals should overlay the ground plane, not
the analog power plane, to maximize the high frequency power
supply rejection.
Digital inputs, especially pixel data inputs and clocking signals,
should never overlay any of the analog signal circuitry and
should be kept as far away as possible.
For best performance, the outputs should each have a 75
resistor connected to GND. These resistors should be placed
as close as possible to the ADV7170/ADV7171 to minimize
reflections.
The ADV7170/ADV7171 should have no inputs left floating.
Any inputs that are not required should be tied to ground.
AA
pins on the ADV7170/ADV7171 must have at least one
CC
) and not the
REV. 0
load