DAC1408D650C1 NXP [NXP Semiconductors], DAC1408D650C1 Datasheet - Page 67

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DAC1408D650C1

Manufacturer Part Number
DAC1408D650C1
Description
Dual 14-bit DAC up to 650 Msps 2, 4 or 8 interpolating
Manufacturer
NXP [NXP Semiconductors]
Datasheet
NXP Semiconductors
Table 107. REINIT_CNTRL register (address 1Ch) bit description
Default settings are shown highlighted.
Table 108. PAGE_ADDRESS register (address 1Fh) bit description
DAC1408D650
Preliminary data sheet
Bit
3
2
1
0
Bit
2 to 0
Symbol
RESYNC_O_L_LN3
RESYNC_O_L_LN2
RESYNC_O_L_LN1
RESYNC_O_L_LN0
Symbol
PAGE[2:0]
DAC1408D; up to 650 Msps; 2×, 4× or 8× interpolating with JESD204A
All information provided in this document is subject to legal disclaimers.
Access
R/W
R/W
R/W
R/W
Access
R/W
Rev. 02 — 11 August 2010
Value
0
1
0
1
0
1
0
1
Value
0h
…continued
Description
lane 3, resync over link
Description
page_address
lane 2, resync over link
lane 1, resync over link
lane 0, resync over link
no action
lane 3 lane controller checks for
k28.5 /K/-symbols
no action
lane 2 lane controller checks for
k28.5 /K/-symbols
no action
lane 1 lane controller checks for
k28.5 /K/-symbols
no action
ln0 lane controller checks for k28.5 /K/-symbols
DAC1408D650
© NXP B.V. 2010. All rights reserved.
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