ADSP-BF522 AD [Analog Devices], ADSP-BF522 Datasheet - Page 63

• Manufacturer Part Number: ADSP-BF522
• Description: Blackfin Embedded Processor
• Manufacturer: AD [Analog Devices]

Preliminary Technical Data
JTAG Test And Emulation Port Timing
Table 56
Table 56. JTAG Port Timing
1
2
3
Parameter
Timing Parameters
t
t
t
t
t
t
Switching Characteristics
t
t
System Inputs = DATA15–0, ARDY, SCL, SDA, PF15–0, PG15–0, PH15–0, TCK, TRST, RESET, NMI, BMODE3–0.
50 MHz Maximum
System Outputs = DATA15–0, ADDR19–1, ABE1–0, AOE, ARE, AWE, AMS3–0, SRAS, SCAS, SWE, SCKE, CLKOUT, SA10, SMS, SCL, SDA, PF15–0, PG15–0, PH15–0,
TCK
STAP
HTAP
SSYS
HSYS
TRSTW
DTDO
DSYS
TDO, EMU.
and
Figure 41
OUTPUTS
TCK
TMS
TDO
SYSTEM
INPUTS
TDI
SYSTEM
TCK Period
TDI, TMS Setup Before TCK High
TDI, TMS Hold After TCK High
System Inputs Setup Before TCK High
System Inputs Hold After TCK High
TRST Pulse Width
TDO Delay from TCK Low
System Outputs Delay After TCK Low
describe JTAG port operations.
2
(measured in TCK cycles)
t
DSYS
t
DTDO
t
SSYS
t
STAP
Rev. PrG | Page 63 of 80 | February 2009
1
t
TCK
3
1
Figure 41. JTAG Port Timing
t
HSYS
t
HTAP
Min
20
12
ADSP-BF522/523/524/525/526/527
4
4
5
4
V
DDEXT
= 1.8 V
Max
10
12
Min
V
20
12
4
4
5
4
DDEXT
= 2.5/3.3 V
Max
10
12
Unit
ns
ns
ns
ns
ns
TCK
ns
ns