ADSP-BF537 AD [Analog Devices], ADSP-BF537 Datasheet - Page 30

• Manufacturer Part Number: ADSP-BF537
• Description: Blackfin Embedded Processor
• Manufacturer: AD [Analog Devices]

ADSP-BF534/ADSP-BF536/ADSP-BF537
External Port Bus Request and Grant Cycle Timing
Table 20
bus grant operations.
Table 20. External Port Bus Request and Grant Cycle Timing
1
2
Parameter
Timing Requirements
t
t
Switching Characteristics
t
t
t
t
t
t
These are preliminary timing parameters that are based on worst-case operating conditions.
The pad loads for these timing parameters are 20 pF.
BS
BH
SD
SE
DBG
EBG
DBH
EBH
and
1, 2
BGH
BR
AMSx
Figure 12
CLKOUT
ADDR19-1
ABE1-0
AWE
ARE
BG
BR Asserted to CLKOUT Low Setup
CLKOUT Low to BR Deasserted Hold Time
CLKOUT Low to AMSx, Address, and RD/WR Disable
CLKOUT Low to AMSx, Address, and RD/WR Enable
CLKOUT High to BG Asserted Setup
CLKOUT High to BG Deasserted Hold Time
CLKOUT High to BGH Asserted Setup
CLKOUT High to BGH Deasserted Hold Time
describe external port bus request and
t
BS
Figure 12. External Port Bus Request and Grant Cycle Timing
Rev. B | Page 30 of 68 | July 2006
t
BH
t
t
t
SD
SD
SD
t
t
DBG
DBH
Min
4.6
0.0
t
t
EBG
EBH
Max
4.5
4.5
3.6
3.6
3.6
3.6
t
t
t
SE
SE
SE
Unit
ns
ns
ns
ns
ns
ns
ns
ns