ADSP-BF537 AD [Analog Devices], ADSP-BF537 Datasheet - Page 40

• Manufacturer Part Number: ADSP-BF537
• Description: Blackfin Embedded Processor
• Manufacturer: AD [Analog Devices]

ADSP-BF534/ADSP-BF536/ADSP-BF537
Serial Peripheral Interface Port—Master Timing
Table 28
Table 28. Serial Peripheral Interface (SPI) Port—Master Timing
Parameter
Timing Requirements
t
Switching Characteristics
t
t
t
t
t
t
t
t
t
SSPIDM
SDSCIM
SPICHM
SPICLM
SPICLK
HDSM
SPITDM
DDSPIDM
HDSPIDM
HSPIDM
and
CPHA = 1
CPHA = 0
Figure 22
(OUTPUT)
(INPUT)
(OUTPUT)
(INPUT)
(OUTPUT)
(CPOL = 0)
(CPOL = 1)
SPISELx
(OUTPUT)
(OUTPUT)
MISO
MISO
MOSI
MOSI
SCK
SCK
Data Input Valid to SCK Edge (Data Input Setup)
SCK Sampling Edge to Data Input Invalid
SPISELx Low to First SCK Edge (x = 0 or x = 1)
Serial Clock High Period
Serial Clock Low Period
Serial Clock Period
Last SCK Edge to SPISELx High (x = 0 or x = 1)
Sequential Transfer Delay
SCK Edge to Data Out Valid (Data Out Delay)
SCK Edge to Data Out Invalid (Data Out Hold)
describe SPI port master operations.
t
SSPIDM
t
SDSCIM
MSB VALID
t
SSPIDM
MSB
t
t
SPICHM
SPICLM
MSB VALID
Figure 22. Serial Peripheral Interface (SPI) Port—Master Timing
t
HSPIDM
t
t
t
SPICHM
DDSPIDM
MSB
SPICLM
t
Rev. B | Page 40 of 68 | July 2006
HSPIDM
t
DDSPIDM
t
HDSPIDM
LSB VALID
t
t
SSPIDM
SPICLK
t
HDSPIDM
LSB VALID
LSB
t
HDSM
LSB
t
HSPIDM
Min
7.5
–1.5
2 t
2 t
2 t
4 t
2 t
2 t
0
–1.0
t
SPITDM
SCLK
SCLK
SCLK
SCLK
SCLK
SCLK
–1.5
–1.5
–1.5
–1.5
–1.5
–1.5
Max
6
+4.0
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns