ADMC326TR AD [Analog Devices], ADMC326TR Datasheet - Page 17

• Manufacturer Part Number: ADMC326TR
• Description: 28-Lead ROM-Based DSP Motor Controller
• Manufacturer: AD [Analog Devices]

ADC Resolution
The ADC is intrinsically linked to the PWM block through the
PWMSYNC pulse controlling the ADC conversion process.
Because of this link, the effective resolution of the ADC is a
function of both the PWM switching frequency and the rate at
which the ADC counter timer is clocked. For a CLKOUT period
of t
ADC is given by:
Where T
update mode, or it is equal to half that period if operating in
double update mode. For an assumed CLKOUT frequency of
20 MHz and PWMSYNC pulsewidth of 2.0 s, the effective
resolution of the ADC block is tabulated for various PWM
switching frequencies in Table VII.
PWM
Freq.
(kHz)
2.4
4
8
18
25
Charging Capacitor Selection
The charging capacitor value is selected based on the sample
(PWM) frequency desired. A selected capacitor value that is
too small will reduce the available resolution of the ADC by
having the ramp voltage rise rapidly and convert too quickly,
not utilizing all possible counts available in the PWM cycle. Too
large a capacitor may not convert in the available PWM cycle,
returning 0xFFF. To select a charging capacitor use Figure 14,
select the sampling frequency desired, then determine if the cur-
rent source is to be tuned to a nominal 100 A or left in the
default (0x0 code) trim state, then determine the proper charge
capacitor from the appropriate curve.
REV. A
CK
and a PWM period of T
200
150
100
50
PWM
0
Max Count = min (4095, (T
Figure 13. PWMSYNCWT Program Value
0
Max Count = min (4095, (T
MODECTRL[7] = 0
Max
Count
4095
2480
1230
535
380
Table VII. ADC Resolution Examples
is equal to the PWM period if operating in single
2
for MODECTRL Bit 7 = 0
for MODECTRL Bit 7 = 1
CHARGING CAPACITOR – nF
Effective
Resolution
12
>11
>10
>9
>8
4
PWM
, the maximum count of the
PWM
6
PWM
– T
MODECTRL[7] = 1
Max
Count
4095
4095
2460
1070
760
– T
CRST
CRST
8
)/2 t
)/t
Effective
Resolution
12
12
>11
>10
>9
CK
CK
)
)
10
–17–
Programmable Current Source
The ADMC326 has an internal current source that is used to
charge an external capacitor, generating the voltage ramp used
for conversion. The magnitude of the output of the current source
circuit is subject to manufacturing variations and can vary from
one device to the next. Therefore, the ADMC326 incudes a pro-
grammable current source whose output can always be tuned to
within 5% of the target 100 A. A 3-bit register, ICONST_TRIM,
allows the user to make this adjustment. The output current is
proportional to the value written to the register: 0x0 produces
the minimum output, and 0x7 produces the maximum output.
The default value of ICONST_TRIM after reset is 0x0.
ADC Reference Ramp Calibration
The peak of the ADC ramp voltage should be as close as pos-
sible to 3.5 V to achieve the optimum ADC resolution and
signal range. When the current source is in the Default State,
the peak of the ADC ramp slope will be lower than this “3.5 V”
target ramp. When the current source value is increased, the
ADC ramp slope will become closer to the target value. The
“tuned” ramp slope is the one closest to the target ramp.
A simple calibration procedure using the internal 2.5 V reference
voltage allows the selection of the ICONST_TRIM register
value to reach this “tuned” ramp slope:
1. A high quality linear ADC capacitor is selected using Figure
2. Program PWMSYNCWT to proper count as in Figure 13.
3. The ADC Max Count is calculated, as described in the ADC
4. The target reference conversion count is calculated as TAR-
5. Reset or software sets the ICONST_TRIM register to zero.
6. Select the calibration V
7. The calibration channel value is compared with the target
8. If this value is greater than the TARGET, the ICONST_TRIM
9. If the calibration channel value is less than the TARGET, the
14 for a tuned ICONST.
Resolution section.
GET = (Max Count) (2.5 V/3.5 V).
and wait one PWM cycle for updated ADC value.
reference conversion.
value is incremented by one, and Step 7 is repeated.
calibration is completed.
100
10
1
1
Figure 14. Timing Capacitor Selection
DEFAULT ICONST
PWM FREQUENCY – kHz
REF
in software on ADC multiplexer
TUNED ICONST
10
ADMC326
100