MK60N256VLL100 FREESCALE [Freescale Semiconductor, Inc], MK60N256VLL100 Datasheet - Page 27

• Manufacturer Part Number: MK60N256VLL100
• Description: Up to 100 MHz ARM Cortex-M4 core with DSP instructions delivering 1.25 Dhrystone MIPS per MHz
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

Freescale Semiconductor, Inc.
f
dco_t_DMX3
t
Symbol
f
fll_acquire
f
J
J
J
loc_high
J
loc_low
f
t
f
acc_pll
pll_ref
cyc_pll
irefstf
fll_ref
cyc_fll
acc_fll
f
f
I
I
dco
vco
intf
pll
2
Internal reference (fast clock) current
Internal reference startup time (fast clock)
Loss of external clock minimum frequency —
RANGE = 00
Loss of external clock minimum frequency —
RANGE = 01, 10, or 11
FLL reference frequency range
DCO output
frequency range
DCO output
frequency
FLL period jitter
FLL accumulated jitter of DCO output over a 1µs
time window
FLL target frequency acquisition time
VCO operating frequency
PLL operating current
PLL reference frequency range
PLL period jitter
PLL accumulated jitter over 1µs window
Description
• PLL @ 96 MHz (f
f
pll_ref
=2MHz, VDIV multiplier=48)
K60 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011.
Table 13. MCG specifications (continued)
Mid-high range (DRS=10)
Mid-high range (DRS=10)
High range (DRS=11)
High range (DRS=11)
Low range (DRS=00)
Low range (DRS=00)
osc_hi_1
Mid range (DRS=01)
Mid range (DRS=01)
1280 × f
1920 × f
2560 × f
1464 × f
2197 × f
2929 × f
640 × f
732 × f
=8MHz,
Table continues on the next page...
fll_ref
fll_ref
fll_ref
fll_ref
fll_ref
fll_ref
fll_ref
fll_ref
Preliminary
PLL
FLL
(16/5) x
(3/5) x
31.25
f
f
48.0
Min.
ints_t
ints_t
2.0
20
40
60
80
—
—
—
—
—
—
—
—
—
—
—
—
Peripheral operating requirements and behaviors
20.97
41.94
62.91
83.89
23.99
47.97
71.99
95.98
TBD
TBD
TBD
TBD
TBD
Typ.
950
400
—
—
—
—
—
—
39.0625
Max.
TBD
TBD
TBD
100
100
4.0
25
50
75
—
—
—
—
—
—
—
—
—
—
1
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
Unit
kHz
kHz
kHz
µA
ms
µA
µs
ps
ps
ps
ps
Notes
9,
9,
2,
4,
6
6
7
8
10
10
3
5
27