KSZ8851-16MLLJ_10 MICREL [Micrel Semiconductor], KSZ8851-16MLLJ_10 Datasheet - Page 47

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KSZ8851-16MLLJ_10

Manufacturer Part Number
KSZ8851-16MLLJ_10
Description
Single-Port Ethernet MAC Controller with 8-Bit or 16-Bit Non-PCI Interface
Manufacturer
MICREL [Micrel Semiconductor]
Datasheet
On-Chip Bus Control Register (0x20 – 0x21): OBCR
This register controls the on-chip bus clock speed for the KSZ8851-16MLLJ. The default of the on-chip bus clock speed is
125MHz. When the external host CPU is running at a higher clock rate, the on-chip bus should be adjusted for the best
performance.
EEPROM Control Register (0x22 – 0x23): EEPCR
To support an external EEPROM, pulled-up the EED_IO pin to High; otherwise, it is pulled-down to Low. If an external
EEPROM is not used, the software programs the host MAC address. If an EEPROM is used in the design, the chip host
MAC address is loaded from the EEPROM immediately after reset. The KSZ8851-16MLLJ allows the software to access
(read and write) the EEPROM directly; that is, the EEPROM access timing can be fully controlled by the software if the
EEPROM Software Access bit is set.
March 2010
Micrel, Inc.
Bit
15-7
6
5-3
2
1-0
Bit
15-6
5
4
3
2-0
-
0
-
0
-
0
0
-
Default Value
0x0
Default Value
0x0
R/W
RW
RW
RW
RW
RW
R/W
RO
WO
RW
RO
RW
Description
Reserved.
Output Pin Drive Strength
Bi-directional or output pad drive strength selection.
0: 8 mA; 1: 16 mA
Reserved.
On-Chip Bus Clock Selection
0: 125MHz (default setting is divided by 1, Bit[1:0]=00)
1: NA (reserved)
On-Chip Bus Clock Divider Selection
00: Divided by 1; 01: Divided by 2; 10: Divided by 3; 11: NA (reserved).
For example to contol the bus clock speed as below:
If Bit 2 = 0 and this value is set 00 to select 125 MHz.
If Bit 2 = 0 and this value is set 01 to select 62.5 MHz.
Description
Reserved.
EESRWA EEPROM Software Read or Write Access
0: software read enable to access EEPROM when software access enabled (bit4=1)
1: software write enable to access EEPROM when software access enabled (bit4=1).
EESA EEPROM Software Access
1: enable software to access EEPROM through bit 3 to bit 0.
0: disable software to access EEPROM.
EESB EEPROM Status Bit
Data Receive from EEPROM. This bit directly reads the EED_IO pin.
EECB EEPROM Control Bits
Bit 2: Data Transmit to EEPROM. This bit directly controls the device’s EED_IO pin.
Bit 1: Serial Clock. This bit directly controls the device’s EESK pin.
Bit 0: Chip Select for EEPROM. This bit directly controls the device’s EECS pin.
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M9999-030210-1.0
KSZ8851-16MLLJ

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