KSZ8851-16MLLJ_10 MICREL [Micrel Semiconductor], KSZ8851-16MLLJ_10 Datasheet - Page 48

• Manufacturer Part Number: KSZ8851-16MLLJ_10
• Description: Single-Port Ethernet MAC Controller with 8-Bit or 16-Bit Non-PCI Interface
• Manufacturer: MICREL [Micrel Semiconductor]

Memory BIST Info Register (0x24 – 0x25): MBIR
This register indicates the build-in self test result for both TX and RX memories after power-up/reset.
Global Reset Register (0x26 – 0x27): GRR
This register controls the global and QMU reset functions with information programmed by the CPU.
0x28 – 0x29: Reserved
March 2010
Micrel, Inc.
Bit
15-13
12
11
10-8
7-5
4
3
2-0
Bit
15-2
1
0
-
-
-
-
-
-
-
0
0
Default Value
0x0
Default Value
0x0000
R/W
RO
RO
RO
RO
RO
RO
RO
RO
R/W
RO
RW
RW
Description
Reserved.
TXMBF TX Memory BIST Test Finish
When set, it indicates the Memory Built In Self Test completion for the TX Memory.
TXMBFA TX Memory BIST Test Fail
When set, it indicates the TX Memory Built In Self Test has failed.
TXMBFC TX Memory BIST Test Fail Count
To indicate the TX Memory Built In Self Test failed count
Reserved.
RXMBF RX Memory Bist Finish
When set, it indicates the Memory Built In Self Test completion for the RX Memory.
RXMBFA RX Memory Bist Fail
When set, it indicates the RX Memory Built In Self Test has failed.
RXMBFC RX Memory BIST Test Fail Count
To indicate the RX Memory Built In Self Test failed count.
Description
Reserved.
QMU Module Soft Reset
1: Software reset is active to clear both TXQ and RXQ memories.
0: Software reset is inactive.
QMU software reset will flush out all TX/RX packet data inside the TXQ and RXQ
memories and reset all QMU registers to default value.
Global Soft Reset
1: Software reset is active.
0: Software reset is inactive.
Global software reset will affect PHY, MAC, QMU, DMA, and the switch core, all
registers value are set to default value.
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KSZ8851-16MLLJ