KSZ8864RMNI MICREL [Micrel Semiconductor], KSZ8864RMNI Datasheet - Page 76

• Manufacturer Part Number: KSZ8864RMNI
• Description: Integrated 4-Port 10/100 Managed Switch with Two MACs MII or RMII Interfaces
• Manufacturer: MICREL [Micrel Semiconductor]

September 2011
Address
Register 157 (0x9D): TOS Priority Control Register 13
7 - 6
5 - 4
3 - 2
1 - 0
Register 158 (0x9E): TOS Priority Control Register 14
7 - 6
5 - 4
3 - 2
1 - 0
Register 159 (0x9F): TOS Priority Control Register 15
7 - 6
5 - 4
3 - 2
1 - 0
Register 176 (0xB0): Reserved
Register 192 (0xC0): Port 1 Control 8
Register 208 (0xD0): Port 2 Control 8
Register 224 (0xE0): Port 3 Control 8
Register 240 (0xF0): Port 4 Control 8
7 - 4
3
2
Name
DSCP[111:110]
DSCP[109:108]
DSCP[107:106]
DSCP[105:104]
DSCP[119:118]
DSCP[117:116]
DSCP[115:114]
DSCP[113:112]
DSCP[127:126]
DSCP[125:124]
DSCP[123:122]
DSCP[121:120]
Reserved
Insert Source Port PVID for
Untagged Packet Destination
to Highest Egress Port
Note: Enabled by the register
135 bit 2
Insert Source Port PVID for
Untagged Packet Destination
to Second Highest Egress Port
Note: Enabled by the register
135 bit 2
Description
IPv4 and IPv6 mapping _ for value 0x37
IPv4 and IPv6 mapping _ for value 0x36
IPv4 and IPv6 mapping _ for value 0x35
IPv4 and IPv6 mapping _ for value 0x34
IPv4 and IPv6 mapping _ for value 0x3B
IPv4 and IPv6 mapping _ for value 0x3A
IPv4 and IPv6 mapping _ for value 0x39
IPv4 and IPv6 mapping _ for value 0x38
IPv4 and IPv6 mapping _ for value 0x3F
IPv4 and IPv6 mapping _ for value 0x3E
IPv4 and IPv6 mapping _ for value 0x3D
IPv4 and IPv6 mapping _ for value 0x3C
Register 208: insert source Port 2 PVID for
untagged frame at egress Port 4
Register 224: insert source Port 3 PVID for
untagged frame at egress Port 4
Register 240: insert source Port 4 PVID for
untagged frame at egress Port 3
Register 192: insert source Port 1 PVID for
untagged frame at egress Port 3
Register 208: insert source Port 2 PVID for
untagged frame at egress Port 3
Register 224: insert source Port 3 PVID for
untagged frame at egress Port 2
Register 240: insert source Port 4 PVID for
untagged frame at egress Port 2.
76
Mode
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RO
M9999-092011-1.4
Default
0000
00
00
00
00
00
00
00
00
00
00
00
00
0
0