KSZ8864RMNI MICREL [Micrel Semiconductor], KSZ8864RMNI Datasheet - Page 94

• Manufacturer Part Number: KSZ8864RMNI
• Description: Integrated 4-Port 10/100 Managed Switch with Two MACs MII or RMII Interfaces
• Manufacturer: MICREL [Micrel Semiconductor]

September 2011
Programming Examples:
Note:
To read out all the counters, the best performance over the SPI bus is (160+3) × 8 × 80 = 104us, where there are 160 registers, three overhead,
eight clocks per access, at 12.5MHz. In the heaviest condition, the byte counter will overflow in two minutes. It is recommended that the software
read all the counters at least every 30 seconds. The per port MIB counters are designed as “read clear.” A per port MIB counter will be cleared
after it is accessed. All port dropped packet MIB counters are not cleared after they are accessed. The application needs to keep track of overflow
and valid conditions on these counters.
(1) MIB counter read (read port 1 Rx64Octets counter)
(2) MIB counter read (read port 2 Rx64Octets counter)
(3) MIB counter read (read port 1 tx drop packets)
Write to Register 110 with 0x1c (read MIB counters selected)
Write to Register 111 with 0x2e (trigger the read operation)
Then
Read Register 117 (counter value 31-24)
// If bit 31 = 1, there was a counter overflow
// If bit 30 = 0, restart (reread) from this register
Read Register 118 (counter value 23-16)
Read Register 119 (counter value 15-8)
Read Register 120 (counter value 7-0)
Write to Register 110 with 0x1c (read MIB counter selected)
Write to Register 111 with 0x4e (trigger the read operation)
Then
Read Register 117 (counter value 31-24)
//If bit 31 = 1, there was a counter overflow
//If bit 30 = 0, restart (reread) from this register
Read Register 118 (counter value 23-16)
Read Register 119 (counter value 15-8)
Read Register 120 (counter value 7-0)
Write to Register 110 with 0x1d
Write to Register 111 with 0x01
Then
Read Register 119 (counter value 15-8)
Read Register 120 (counter value 7-0)
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