CP80S54E ETC2 [List of Unclassifed Manufacturers], CP80S54E Datasheet - Page 20

• Manufacturer Part Number: CP80S54E
• Description: EPROM/ROM-Based 8-Bit Microcontroller Series
• Manufacturer: ETC2 [List of Unclassifed Manufacturers]

2.6.1 Power-up Reset Timer(PWRT)
The Power-up Reset Timer provides a nominal 18ms delay after Power-on Reset (POR), Brown-out Reset (BOR),
RSTB Reset or WDT time-out Reset. The device is kept in reset state as long as the PWRT is active.
The PWDT delay will vary from device to device due to Vdd, temperature, and process variation.
2.6.2 Oscillator Start-up Timer(OST)
The OST timer provides a 128 oscillator cycle delay (from OSCI input) after the PWRT delay (18ms) is over. This
delay ensures that the X’tal oscillator or resonator has started and stabilized. The device is kept in reset state as
long as the OST is active.
This counter only starts incrementing after the amplitude of the OSCI signal reaches the oscillator input thresholds.
2.6.3 Reset Sequence
When Power-on Reset (POR), Brown-out Reset (BOR), RSTB Reset or WDT time-out Reset is detected, the reset
sequence is as follows:
1.
2.
3.
4.
The totally system reset delay time is 18ms plus 128 oscillator cycle time.
FIGURE 2.5: Simplified Block Diagram of on-chip Reset Circuit
OSCI
RSTB
Vdd
The reset latch is set and the PWRT & OST are cleared.
When the internal POR, BOR, RSTB Reset or WDT time-out Reset pulse is finished, then the PWRT begins
counting.
After the PWRT time-out, the OST is activated.
And after the OST delay is over, the reset latch will be cleared and thus end the on-chip reset signal.
Low Voltage
Power-on
Detector
Module
(POR)
(LVD)
Reset
WDT
RC OSC
On-Chip
Time-out
BOR
POR
WDT
Reset Timer
Power-up
(PWRT)
RESET
Start-up Timer
Oscillator
RESET
(OST)
CP80S54/56
S
R
Reset
Latch
Q
Q
Rev0.1 Nov 30, 2005
P.20/CP80S54/S56
CHIP
RESET