MC68HC05K1 FREESCALE [Freescale Semiconductor, Inc], MC68HC05K1 Datasheet - Page 56

• Manufacturer Part Number: MC68HC05K1
• Description: HCMOS Microcontroller Unit
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

Technical Data
5.3.3 Computer Operating Properly (COP) Reset
5.3.4 Illegal Address Reset
Technical Data
Address:
A timeout of the computer operating properly (COP) watchdog
generates a COP reset. The COP watchdog is part of a software error
detection system and must be cleared periodically to start a new timeout
period. To clear the COP watchdog and prevent a COP reset, write a
logic 0 to bit 0 (COPC) of the COP register at location $03F0.
See
The COP register, shown in
returns the contents of a ROM location when read.
The COP watchdog function is a mask option.
COPC — COP Clear Bit
An opcode fetch from an address that is not in the ROM (locations
$0200–$03FF) or the RAM (locations $00E0–$00FF) generates an
illegal address reset. An illegal address reset pulls the RESET pin low
for one cycle of the internal clock.
Reset:
Read:
Write:
COPC is a write-only bit. Periodically writing a logic 0 to COPC
prevents the COP watchdog from resetting the MCU. Writing a logic 1
has no effect. Reset clears the COPC bit.
Freescale Semiconductor, Inc.
8.5 COP
For More Information On This Product,
$03F0
Bit 7
U
0
Go to: www.freescale.com
Watchdog.
= Unimplemented
Figure 5-2. COP Register (COPR)
U
6
0
Resets
U
5
0
Figure
U = Unaffected
U
4
0
MC68HC05K0 • MC68HC05K1 — Rev. 2.0
5-2, is a write-only register that
U
3
0
U
2
0
U
1
1
COPC
Bit 0
0
0