MC68HC05K1 FREESCALE [Freescale Semiconductor, Inc], MC68HC05K1 Datasheet - Page 80

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MC68HC05K1

Manufacturer Part Number
MC68HC05K1
Description
HCMOS Microcontroller Unit
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
Technical Data
Technical Data
NOTE:
RTIFR — Real-Time Interrupt Flag Reset Bit
RT1 and RT0 — Real-Time Interrupt Select Bits 1 and 0
Be careful when altering RT0 or RT1 when a timeout is imminent or
uncertain. If the selected RTx is modified during a cycle when the
counter is switching, an RTIF can be missed or an additional RTIF can
be generated. To avoid this problem, clear the COP just before changing
RT1 and RT0.
The COP timer is the RTI timer divided by eight. However, clearing the
COP clears only the last three dividers. It does not clear the RTI section
of the divider chain. Therefore, the COP timeout period is in the range of
seven to eight times the RTI period.
1. At 2-MHz bus, 4-MHz XTAL, 0.5 s per cycle
RT1:RT0
Writing a logic 1 to this write-only bit clears the RTIF bit. RTIFR
always reads as a logic 0. Reset does not affect RTIFR.
These read/write bits select 1of four real-time interrupt rates, as
shown in
watchdog, changing the real-time interrupt rate also changes the
counting rate of the COP watchdog. Reset sets RT1 and RT0,
selecting the longest COP timeout period and real-time interrupt
period.
Freescale Semiconductor, Inc.
0 0
0 1
1 0
1 1
For More Information On This Product,
Table 8-1. Real-Time Interrupt Rate Selection
Table
Go to: www.freescale.com
2
2
2
2
17
14
15
16
of Cycles
Number
Multifunction Timer
to RTI
= 131,072
= 16,384
= 32,768
= 65,536
8-1. Because the selected RTI output drives the COP
Period
16.4 ms
32.8 ms
65.5 ms
8.2 ms
RTI
(1)
MC68HC05K0 • MC68HC05K1 — Rev. 2.0
2
to COP Reset
2
2
2
20
17
18
19
of Cycles
Number
= 1,048,576
= 131,072
= 262,144
= 524,288
COP Timeout
Period
131.1 ms
262.1 ms
524.3 ms
65.5 ms
(1)

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