PIC18F24 MICROCHIP [Microchip Technology], PIC18F24 Datasheet - Page 313

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PIC18F24

Manufacturer Part Number
PIC18F24
Description
28/40-Pin High-Performance, Enhanced Flash Microcontrollers with CAN Module
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet

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RCALL
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
 2004 Microchip Technology Inc.
Q Cycle Activity:
Before Instruction
After Instruction
operation
Decode
No
Q1
PC =
PC =
TOS =
Read literal ‘n’
Push PC to
Address (HERE)
Address (Jump)
Address (HERE + 2)
(PC) + 2
Relative Call
[ label ] RCALL
-1024
(PC) + 2 + 2n
None
Subroutine call with a jump up to 1K
from the current location. First, return
address (PC + 2) is pushed onto the
stack. Then, add the 2’s complement
number ‘2n’ to the PC. Since the PC will
have incremented to fetch the next
instruction, the new address will be
PC + 2 + 2n. This instruction is a
two-cycle instruction.
1
2
operation
HERE
stack
1101
No
Q2
n
1023
TOS,
RCALL Jump
1nnn
operation
Process
PC
Data
No
n
Q3
nnnn
operation
Write to
PC
No
Q4
nnnn
RESET
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
After Instruction
Decode
Registers =
Flags*
Q1
=
Reset
[ label ]
None
Reset all registers and flags that are
affected by a MCLR Reset.
All
This instruction provides a way to
execute a MCLR Reset in software.
1
1
RESET
Reset
Start
0000
Q2
Reset Value
Reset Value
PIC18FXX8
RESET
0000
operation
No
Q3
DS41159D-page 311
1111
operation
No
Q4
1111

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