PIC18F2525 MICROCHIP [Microchip Technology], PIC18F2525 Datasheet - Page 189

• Manufacturer Part Number: PIC18F2525
• Description: 28/40/44-Pin Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology
• Manufacturer: MICROCHIP [Microchip Technology]

17.4.7
In I
reload value is placed in the lower 7 bits of the
SSPADD register (Figure 17-17). When a write occurs
to SSPBUF, the Baud Rate Generator will automatically
begin counting. The BRG counts down to ‘0’ and stops
until another reload has taken place. The BRG count is
decremented twice per instruction cycle (T
Q2 and Q4 clocks. In I
reloaded automatically.
FIGURE 17-17:
TABLE 17-3:
 2004 Microchip Technology Inc.
Note 1:
2
C Master mode, the Baud Rate Generator (BRG)
40 MHz
40 MHz
40 MHz
16 MHz
16 MHz
16 MHz
4 MHz
4 MHz
4 MHz
Fosc
BAUD RATE
I
2
C™ CLOCK RATE W/BRG
BAUD RATE GENERATOR BLOCK DIAGRAM
SSPM3:SSPM0
2
Note 1:
C Master mode, the BRG is
10 MHz
10 MHz
10 MHz
4 MHz
4 MHz
4 MHz
1 MHz
1 MHz
1 MHz
SCL
F
CY
The I
to rates greater than 100 kHz) in all details, but may be used with care where
higher rates are required by the application.
SSPM3:SSPM0
2
C interface does not conform to the 400 kHz I
CY
PIC18F2525/2620/4525/4620
) on the
Reload
Control
Preliminary
CLKO
20 MHz
20 MHz
20 MHz
8 MHz
8 MHz
8 MHz
2 MHz
2 MHz
2 MHz
F
CY
*2
Reload
Once the given operation is complete (i.e., transmis-
sion of the last data bit is followed by ACK), the internal
clock will automatically stop counting and the SCL pin
will remain in its last state.
Table 17-3 demonstrates clock rates based on
instruction cycles and the BRG value loaded into
SSPADD.
BRG Down Counter
SSPADD<6:0>
BRG Value
1Fh
0Ch
18h
63h
09h
27h
02h
09h
00h
2
C specification (which applies
F
OSC
/4
(2 Rollovers of BRG)
DS39626B-page 187
400 kHz
400 kHz
333 kHz
312.5 kHz
1 MHz
100 kHz
308 kHz
100 kHz
100 kHz
F
SCL
(1)
(1)
(1)
(1)