PIC18F2525 MICROCHIP [Microchip Technology], PIC18F2525 Datasheet - Page 377
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PIC18F2525
Manufacturer Part Number
PIC18F2525
Description
28/40/44-Pin Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
1.PIC18F2525.pdf
(390 pages)
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INDEX
A
A/D ................................................................................... 223
Absolute Maximum Ratings ............................................. 323
AC (Timing) Characteristics ............................................. 341
AC Characteristics
Access Bank
ACKSTAT ........................................................................ 191
ACKSTAT Status Flag ..................................................... 191
ADCON0 Register ............................................................ 223
ADCON1 Register ............................................................ 223
ADCON2 Register ............................................................ 223
ADDFSR .......................................................................... 310
ADDLW ............................................................................ 273
ADDULNK ........................................................................ 310
ADDWF ............................................................................ 273
ADDWFC ......................................................................... 274
ADRESH Register ............................................................ 223
ADRESL Register .................................................... 223, 226
Analog-to-Digital Converter. See A/D.
ANDLW ............................................................................ 274
ANDWF ............................................................................ 275
Assembler
Auto-Wake-up on Sync Break Character ......................... 214
2004 Microchip Technology Inc.
A/D Converter Interrupt, Configuring ....................... 227
Acquisition Requirements ........................................ 228
ADCON0 Register .................................................... 223
ADCON1 Register .................................................... 223
ADCON2 Register .................................................... 223
ADRESH Register ............................................ 223, 226
ADRESL Register .................................................... 223
Analog Port Pins, Configuring .................................. 230
Associated Registers ............................................... 232
Calculating the Minimum Required
Configuring the Module ............................................ 227
Conversion Clock (T
Conversion Status (GO/DONE Bit) .......................... 226
Conversions ............................................................. 231
Converter Characteristics ........................................ 359
Discharge ................................................................. 231
Operation in Power Managed Modes ...................... 230
Selecting and Configuring
Special Event Trigger (CCP) .................................... 232
Special Event Trigger (ECCP) ................................. 148
Use of the CCP2 Trigger .......................................... 232
Load Conditions for Device
Parameter Symbology ............................................. 341
Temperature and Voltage Specifications ................. 342
Timing Conditions .................................................... 342
Internal RC Accuracy ............................................... 344
Mapping with Indexed Literal
Remapping with Indexed Literal Offset
GO/DONE Bit ........................................................... 226
MPASM Assembler .................................................. 317
Acquisition Time .............................................. 228
Acquisition Time .............................................. 229
Timing Specifications ....................................... 342
Offset Addressing Mode .................................... 71
Addressing Mode ............................................... 71
AD
) ........................................... 229
PIC18F2525/2620/4525/4620
Preliminary
B
Bank Select Register (BSR) .............................................. 59
Baud Rate Generator ...................................................... 187
BC .................................................................................... 275
BCF ................................................................................. 276
BF .................................................................................... 191
BF Status Flag ................................................................. 191
Block Diagrams
BN .................................................................................... 276
BNC ................................................................................. 277
BNN ................................................................................. 277
BNOV .............................................................................. 278
BNZ ................................................................................. 278
BOR. See Brown-out Reset.
A/D ........................................................................... 226
Analog Input Model .................................................. 227
Baud Rate Generator .............................................. 187
Capture Mode Operation ......................................... 141
Comparator Analog Input Model .............................. 237
Comparator I/O Operating Modes ........................... 234
Comparator Output .................................................. 236
Comparator Voltage Reference ............................... 240
Compare Mode Operation ....................................... 142
Device Clock .............................................................. 28
Enhanced PWM ....................................................... 149
EUSART Receive .................................................... 213
EUSART Transmit ................................................... 211
External Power-on Reset Circuit
Fail-Safe Clock Monitor ........................................... 261
Generic I/O Port ....................................................... 105
High/Low-Voltage Detect with
Interrupt Logic ............................................................ 92
MSSP (I
MSSP (I
MSSP (SPI Mode) ................................................... 161
On-Chip Reset Circuit ................................................ 41
PIC18F2525/2620 ..................................................... 10
PIC18F4525/4620 ..................................................... 11
PLL (HS Mode) .......................................................... 25
PORTD and PORTE (Parallel Slave Port) ............... 120
PWM Operation (Simplified) .................................... 144
Reads from Flash Program Memory ......................... 77
Single Comparator ................................................... 235
Table Read Operation ............................................... 73
Table Write Operation ............................................... 74
Table Writes to Flash Program Memory .................... 79
Timer0 in 16-Bit Mode ............................................. 124
Timer0 in 8-Bit Mode ............................................... 124
Timer1 ..................................................................... 128
Timer1 (16-Bit Read/Write Mode) ............................ 128
Timer2 ..................................................................... 134
Timer3 ..................................................................... 136
Timer3 (16-Bit Read/Write Mode) ............................ 136
Voltage Reference Output
Watchdog Timer ...................................................... 258
(Slow V
External Input .................................................. 244
Buffer Example ................................................ 241
2
2
C Master Mode) ........................................ 185
C Mode) .................................................... 170
DD
Power-up) ........................................ 43
DS39626B-page 375
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