PIC18F2525 MICROCHIP [Microchip Technology], PIC18F2525 Datasheet - Page 378

• Manufacturer Part Number: PIC18F2525
• Description: 28/40/44-Pin Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology
• Manufacturer: MICROCHIP [Microchip Technology]

PIC18F2525/2620/4525/4620
BOV .................................................................................. 281
BRA .................................................................................. 279
Break Character (12-Bit) Transmit and Receive .............. 216
BRG. See Baud Rate Generator.
Brown-out Reset (BOR) ..................................................... 44
BSF .................................................................................. 279
BTFSC ............................................................................. 280
BTFSS .............................................................................. 280
BTG .................................................................................. 281
BZ ..................................................................................... 282
C
C Compilers
CALL ................................................................................ 282
CALLW ............................................................................. 311
Capture (CCP Module) ..................................................... 141
Capture (ECCP Module) .................................................. 148
Capture/Compare/PWM (CCP) ........................................ 139
Clock Sources .................................................................... 28
CLRF ................................................................................ 283
CLRWDT .......................................................................... 283
Code Examples
DS39626B-page 376
Detecting .................................................................... 44
Disabling in Sleep Mode ............................................ 44
Software Enabled ....................................................... 44
MPLAB C17 ............................................................. 318
MPLAB C18 ............................................................. 318
MPLAB C30 ............................................................. 318
Associated Registers ............................................... 143
CCP Pin Configuration ............................................. 141
CCPRxH:CCPRxL Registers ................................... 141
Prescaler .................................................................. 141
Software Interrupt .................................................... 141
Timer1/Timer3 Mode Selection ................................ 141
Capture Mode. See Capture.
CCPRxH Register .................................................... 140
CCPRxL Register ..................................................... 140
Compare Mode. See Compare.
Interaction of Two CCP Modules ............................. 140
Module Configuration ............................................... 140
Pin Assignment ........................................................ 140
Timer Resources ...................................................... 140
Selecting the 31 kHz Source ...................................... 29
Selection Using OSCCON Register ........................... 29
16 x 16 Signed Multiply Routine ................................ 90
16 x 16 Unsigned Multiply Routine ............................ 90
8 x 8 Signed Multiply Routine .................................... 89
8 x 8 Unsigned Multiply Routine ................................ 89
Changing Between Capture Prescalers ................... 141
Computed GOTO Using an
Data EEPROM Read ................................................. 85
Data EEPROM Refresh Routine ................................ 86
Data EEPROM Write ................................................. 85
Erasing a Flash Program Memory Row ..................... 78
Fast Register Stack .................................................... 56
How to Clear RAM (Bank 1) Using
Implementing a Real-Time Clock Using
Initializing PORTA .................................................... 105
Initializing PORTB .................................................... 108
Initializing PORTC .................................................... 111
Initializing PORTD .................................................... 114
Initializing PORTE .................................................... 117
Offset Value ....................................................... 56
Indirect Addressing ............................................ 67
a Timer1 Interrupt Service ............................... 131
Preliminary
Code Protection ....................................................... 249, 263
COMF .............................................................................. 284
Comparator ...................................................................... 233
Comparator Specifications ............................................... 339
Comparator Voltage Reference ....................................... 239
Compare (CCP Module) .................................................. 142
Compare (ECCP Module) ................................................ 148
Computed GOTO ............................................................... 56
Configuration Bits ............................................................ 249
Context Saving During Interrupts ..................................... 103
Conversion Considerations .............................................. 372
CPFSEQ .......................................................................... 284
CPFSGT .......................................................................... 285
CPFSLT ........................................................................... 285
Crystal Oscillator/Ceramic Resonator ................................ 23
D
Data Addressing Modes .................................................... 67
Loading the SSPBUF (SSPSR)
Reading a Flash Program
Saving Status, WREG and
Writing to Flash Program Memory ....................... 80–81
Associated Registers ............................................... 263
Configuration Register Protection ............................ 266
Data EEPROM ......................................................... 266
Program Memory ..................................................... 264
Analog Input Connection
Associated Registers ............................................... 237
Configuration ........................................................... 234
Effects of a Reset .................................................... 236
Interrupts ................................................................. 236
Operation ................................................................. 235
Operation During Sleep ........................................... 236
Outputs .................................................................... 235
Reference ................................................................ 235
Response Time ........................................................ 235
Accuracy and Error .................................................. 240
Associated Registers ............................................... 241
Configuring .............................................................. 239
Connection Considerations ...................................... 240
Effects of a Reset .................................................... 240
Operation During Sleep ........................................... 240
Associated Registers ............................................... 143
CCPRx Register ...................................................... 142
Pin Configuration ..................................................... 142
Software Interrupt .................................................... 142
Special Event Trigger .............................. 137, 142, 232
Timer1/Timer3 Mode Selection ................................ 142
Special Event Trigger .............................................. 148
Comparing Options with the Extended
Direct ......................................................................... 67
Indexed Literal Offset ................................................ 69
Indirect ....................................................................... 67
Inherent and Literal .................................................... 67
Register ........................................................... 164
Memory Word .................................................... 77
BSR Registers in RAM .................................... 103
Considerations ................................................. 237
External Signal ................................................ 235
Internal Signal .................................................. 235
Instruction Set Enabled ..................................... 70
Instructions Affected .......................................... 69
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