LAN91C100-FD-SS SMSC [SMSC Corporation], LAN91C100-FD-SS Datasheet - Page 8

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LAN91C100-FD-SS

Manufacturer Part Number
LAN91C100-FD-SS
Description
FEAST Fast Ethernet Controller with Full Duplex Capability
Manufacturer
SMSC [SMSC Corporation]
Datasheet
SMSC DS – LAN91C100FD REV. B
PQFP/TQFP
25, 26, 28,
20, 21, 22,
PIN NO.
202
195
194
198
196
192
30
19
12
18
29
17
24
11
1
6
9
Loopback
nLink
Status
nFullstep
MII Select
AUI Select
Transmit
Enable
100 Mbps
Carrier
Sense 100
Mbps
Receive
Data Valid
Collision
Detect 100
Mbps
Transmit
Data
Transmit
Clock
Receive
Clock
Receive
Data
Manage-
ment Data
Input
Manage-
ment Data
Output
Manage-
ment Clock
Receive
Error
NAME
LBK
nLNK
nFSTEP
MIISEL
AUISEL
TXEN100
CRS100
RX_DV
COL100
TXD0-
TXD3
TX25
RX25
RXD0-
RXD3
MDI
MDO
MCLK
RX_ER
SYMBOL
DESCRIPTION OF PIN FUNCTIONS
BUFFER
pulldown
pulldown
pulldown
pulldown
pulldown
TYPE
pullup
pullup
pullup
I with
I with
I with
I with
I with
I with
I with
I with
O12
O12
O4
O4
O4
O4
O4
O4
I
Page 8
Output. Active when LOOP bit is set (TCR bit 1).
Independent of port selection (MIISEL=X).
Input. General purpose input port used to convey
LINK status (EPHSR bit 14). Independent of port
selection (MIISEL=X).
Output. Non volatile output pin. Driven by inverse
of FULLSTEP (CONFIG bit 10). Independent of
port selection (MIISEL=X).
Output. Non volatile output pin. Driven by MII
SELECT (CONFIG bit 15). High indicates the MII
port is selected, low indicates the 10 Mbps ENDEC
is selected.
Output.
SELECT (CONFIG bit 8). Independent of port
selection (MIISEL= X).
Output to MII PHY.
transmission. This pin stays low if MIISEL is low.
Input from MII PHY. Envelope of packet reception
used for deferral and backoff purposes. This pin is
ignored when MIISEL is low.
Input from MII PHY.
reception. Used for receive data framing. This pin
is ignored when MIISEL is low.
Input from MII PHY. Collision detection input. This
pin is ignored when MIISEL is low.
Outputs. Transmit Data nibble to MII PHY.
Input. Transmit clock input from MII. Nibble rate
clock (25 MHz). This pin is ignored when MIISEL
is low.
Input. Receive clock input from MII PHY. Nibble
rate clock. This pin is ignored when MIISEL is low.
Inputs.
These pins are ignored when MIISEL is low.
MII management data input.
MII management data output.
MII management clock.
Input. Indicates a code error detected by PHY.
Used by the LAN91C100FD to discard the packet
being received. The error indication reported for
this event is the same as a bad CRC (Receive
Status Word bit 13). This pin is ignored when
MIISEL is low.
Non volatile output pin. Driven by AUI
Received Data nibble from MII PHY.
DESCRIPTION
Envelope to 100 Mbps
Envelope of data valid
Rev. 01-20-06

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