MC68HC908AS60ACFN FREESCALE [Freescale Semiconductor, Inc], MC68HC908AS60ACFN Datasheet - Page 156

• Manufacturer Part Number: MC68HC908AS60ACFN
• Description: M68HC08 Microcontrollers
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

Monitor ROM (MON)
14.3.2 Data Format
Communication with the monitor ROM is in standard non-return-to-zero (NRZ) mark/space data format.
(See
The data transmit and receive rate can be anywhere up to 28.8 kBaud. Transmit and receive baud rates
must be identical.
14.3.3 Echoing
As shown in
for error checking.
Any result of a command appears after the echo of the last byte of the command.
14.3.4 Break Signal
A start bit followed by nine low bits is a break signal. (See
signal, it drives the PTA0 pin high for the duration of two bits before echoing the break signal.
156
Figure 14-2
SENT TO
MONITOR
BREAK
$A5
ECHO
Figure
START
BIT
START
START
MC68HC908AZ60A • MC68HC908AS60A • MC68HC908AS60E Data Sheet, Rev. 6
and
BIT
BIT
0
14-4, the monitor ROM immediately echoes each received byte back to the PTA0 pin
BIT 0
READ
1
Figure
BIT 0
BIT 0
2
BIT 1
14-3.)
3
Figure 14-3. Sample Monitor Waveforms
MISSING STOP BIT
BIT 1
BIT 1
READ
4
Figure 14-2. Monitor Data Format
BIT 2
Figure 14-5. Break Transaction
Figure 14-4. Read Transaction
5
BIT 2
BIT 2
6
BIT 3
ADDR. HIGH
BIT 3
BIT 3
7
BIT 4
BIT 4
BIT 4
ADDR. HIGH
BIT 5
Figure
BIT 5
BIT 5
TWO-STOP-BIT DELAY BEFORE ZERO ECHO
BIT 6
0
14-5). When the monitor receives a break
ADDR. LOW
BIT 6
BIT 6
1
BIT 7
2
BIT 7
BIT 7
3
STOP
ADDR. LOW
BIT
STOP
STOP
4
BIT
BIT
START
NEXT
5
BIT
Freescale Semiconductor
START
START
NEXT
NEXT
BIT
BIT
6
RESULT
DATA
7