MC68HC908AS60ACFN FREESCALE [Freescale Semiconductor, Inc], MC68HC908AS60ACFN Datasheet - Page 165

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MC68HC908AS60ACFN

Manufacturer Part Number
MC68HC908AS60ACFN
Description
M68HC08 Microcontrollers
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
15.3.6 Reset Vector Fetch
A reset vector fetch occurs when the vector address appears on the data bus. A reset vector fetch clears
the COP prescaler.
15.3.7 COPD
The COPD signal reflects the state of the COP disable bit (COPD) in the configuration register. (See
Chapter 11 Configuration Register
15.3.8 COPL
The COPL signal reflects the state of the COP rate select bit. (COPL) in the configuration register. (See
Chapter 11 Configuration Register
15.4 COP Control Register
The COP control register is located at address $FFFF and overlaps the reset vector. Writing any value to
$FFFF clears the COP counter and starts a new timeout period. Reading location $FFFF returns the low
byte of the reset vector.
15.5 Interrupts
The COP does not generate CPU interrupt requests.
15.6 Monitor Mode
The COP is disabled in monitor mode when V
15.7 Low-Power Modes
The WAIT and STOP instructions put the MCU in low power-consumption standby modes.
15.7.1 Wait Mode
The COP remains active in wait mode. To prevent a COP reset during wait mode, periodically clear the
COP counter in a CPU interrupt routine.
Freescale Semiconductor
Address:
Reset:
Read:
Write:
MC68HC908AZ60A • MC68HC908AS60A • MC68HC908AS60E Data Sheet, Rev. 6
$FFFF
Bit 7
Figure 15-2. COP Control Register (COPCTL)
6
(CONFIG-1)).
(CONFIG-1)).
5
Hi
Low Byte of Reset Vector
is present on the IRQ pin or on the RST pin.
Unaffected by Reset
Clear COP Counter
4
3
2
1
COP Control Register
Bit 0
165

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