MC68HC908AS60ACFN FREESCALE [Freescale Semiconductor, Inc], MC68HC908AS60ACFN Datasheet - Page 412

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MC68HC908AS60ACFN

Manufacturer Part Number
MC68HC908AS60ACFN
Description
M68HC08 Microcontrollers
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
Glossary
toggle — To change the state of an output from a logic 0 to a logic 1 or from a logic 1 to a logic 0.
tracking mode — Mode of low-jitter PLL operation during which the PLL is locked on a frequency. Also
two’s complement — A means of performing binary subtraction using addition techniques. The most
unbuffered — Utilizes only one register for data; new data overwrites current data.
unimplemented memory location — A memory location that is not used. Writing to an unimplemented
V —The overflow bit in the condition code register of the CPU08. The CPU08 sets the V bit when a two's
variable — A value that changes during the course of program execution.
VCO — See "voltage-controlled oscillator."
vector — A memory location that contains the address of the beginning of a subroutine written to service
voltage-controlled oscillator (VCO) — A circuit that produces an oscillating output signal of a frequency
waveform — A graphical representation in which the amplitude of a wave is plotted against time.
wired-OR — Connection of circuit outputs so that if any output is high, the connection point is high.
word — A set of two bytes (16 bits).
write — The transfer of a byte of data from the CPU to a memory location.
X — The lower byte of the index register (H:X) in the CPU08.
Z — The zero bit in the condition code register of the CPU08. The CPU08 sets the zero bit when an
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see "acquisition mode."
significant bit of a two’s complement number indicates the sign of the number (1 indicates negative).
The two’s complement negative of a number is obtained by inverting each bit in the number and then
adding 1 to the result.
location has no effect. Reading an unimplemented location returns an unpredictable value. Executing
an opcode at an unimplemented location causes an illegal address reset.
complement overflow occurs. The signed branch instructions BGT, BGE, BLE, and BLT use the
overflow bit.
an interrupt or reset.
that is controlled by a dc voltage applied to a control input.
arithmetic operation, logical operation, or data manipulation produces a result of $00.
MC68HC908AZ60A • MC68HC908AS60A • MC68HC908AS60E Data Sheet, Rev. 6
Freescale Semiconductor

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