MC68HC912BD32CFU10 FREESCALE [Freescale Semiconductor, Inc], MC68HC912BD32CFU10 Datasheet - Page 118

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MC68HC912BD32CFU10

Manufacturer Part Number
MC68HC912BD32CFU10
Description
Advance Information
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
PWM Register Description
PWCLK — PWM Clock Select Register with Concatenate Bits
Pulse Width Modulator
MC68HC912BD32 Rev 1.0
RESET:
NOTE:
CON23
Bit 7
0
CON23 — Concatenate PWM Channels 2 and 3
CON01 — Concatenate PWM Channels 0 and 1
These bits should be changed only when both corresponding channels
are disabled. For Left Aligned output mode operation when changing
these bits the user should write to the associated PWM counters as the
LAST operation before enabling (setting PWENx = q) the channel(s).
PCKA2–PCKA0 — Prescaler for Clock A
CON01
Read and write anytime.
When concatenated, channel 2 becomes the high-order byte and
channel 3 becomes the low-order byte. Channel 2 output pin is used
as the output for this 16-bit PWM (bit 2 of port P). Channel 3
clock-select control bits determines the clock source.
When concatenated, channel 0 becomes the high-order byte and
channel 1 becomes the low-order byte. Channel 0 output pin is used
as the output for this 16-bit PWM (bit 0 of port P). Channel 1
clock-select control bits determines the clock source.
Clock A is one of two clock sources which may be used for channels
0 and 1. These three bits determine the rate of clock A, as shown in
Table
Freescale Semiconductor, Inc.
6
0
For More Information On This Product,
0 = Channels 2 and 3 are separate 8-bit PWMs.
1 = Channels 2 and 3 are concatenated to create one 16-bit PWM
0 = Channels 0 and 1 are separate 8-bit PWMs.
1 = Channels 0 and 1 are concatenated to create one 16-bit PWM
23.
channel.
channel.
PCKA2
Go to: www.freescale.com
5
0
Pulse Width Modulator
PCKA1
4
0
PCKA0
3
0
PCKB2
2
0
PCKB1
1
0
PCKB0
Bit 0
0
$0040
6-pwm

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