DS567 XILINX [Xilinx, Inc], DS567 Datasheet - Page 22

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DS567

Manufacturer Part Number
DS567
Description
DDR2 Memory Controller for PowerPC 440 Processors
Manufacturer
XILINX [Xilinx, Inc]
Datasheet
DDR2 Memory Controller for PowerPC 440 Processors
22
In
Controller closes all the banks to perform the auto refresh function. After the auto refresh command, the
PPC440MC DDR2 Memory Controller opens the last accessed bank before the auto refresh command.
In this case, the last bank that was accessed before the auto refresh command was bank 7, row 0. The
PPC440MC DDR2 Memory Controller opens that bank after the auto refresh command in clock 46. The
MCI presets a command in clock 50. The row and the bank are the same as the previous command and
the MCI does not assert the conflict bit. The PPC440MC DDR2 Memory Controller has already opened
the bank and the row and the command proceeds normally.
X-Ref Target - Figure 14
MCMIADDRREADYTOACCEPT
Figure
MIMCREADNOTWRITE
MIMCBANKCONFLICT/
MIMCADDRESSVALID
MIMCROWCONFLICT
internal_auto_ref_flag
14, the internal auto refresh flag gets asserted in clock 12. The PPC440MC DDR2 Memory
MIMCADDRESS
internal_conflict
cmd_to_DDR2
internal_bank0
internal_bank1
internal_bank2
internal_bank3
mi_mc_clk
1
Figure 14: Bank Management During Auto Refresh
2
B4, R0
B0, R0
B2, R0
B1, R0
B7,R0
Act,B7
www.xilinx.com
12
B7, R0
B4, R0
B0, R0
B1, R0
Wr,B7
Pre all
Auto re
DS567 (v1.1.1) March 31, 2008
46
Act,B7
50
B7, R0
B7,R0
DS567_15_071607

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