SSTUG32866EC/G NXP [NXP Semiconductors], SSTUG32866EC/G Datasheet - Page 16

• Manufacturer Part Number: SSTUG32866EC/G
• Description: 1.8 V 25-bit 1 : 1 or 14-bit 1 : 2 configurable registered buffer
• Manufacturer: NXP [NXP Semiconductors]

NXP Semiconductors
SSTUG32866_1
Product data sheet
Fig 9. Timing diagram for the second SSTUG32866 (1 : 2 Register B configuration) device used in pair;
(not used)
PAR_IN
RESET
QERR
(1) PAR_IN is driven from PPO of the first SSTUG32866 device.
DCS
CSR
PPO
Q14
D14
CK
CK
Q1
D1
to
to
(1)
C0 = 1, C1 = 1
CK to Q
t
PD
t
su
m
t
h
Rev. 01 — 29 June 2007
1.8 V DDR2-1G configurable registered buffer with parity
m + 1
CK to QERR
CK to PPO
t
t
PD
PD
t
su
m + 2
t
h
m + 3
SSTUG32866
CK to QERR
t
PD
© NXP B.V. 2007. All rights reserved.
m + 4
002aaa657
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