HD6475328-CP10 HITACHI [Hitachi Semiconductor], HD6475328-CP10 Datasheet - Page 64

• Manufacturer Part Number: HD6475328-CP10
• Description: original Hitachi CMOS microcomputer unit (MCU)
• Manufacturer: HITACHI [Hitachi Semiconductor]

• (Example of prefix code in DADD instruction)
Effective address
Prefix code
Operation code
10100rrr
00000000
10100rrr
Special Format: In this format the operation code comes first, followed by the effective address
field and effective address extension. This format is used in branching instructions, system
control instructions, and other instructions that can be executed faster if the operation is specified
before the operand.
Operation code
Effective address field
Effective address extension
• Operation code: One or two bytes defining the operation to be performed by the instruction.
• Effective address field and effective address extension: Zero to three bytes containing
information used to calculate an effective address.
3.4.2 Addressing Modes
The CPU supports 7 addressing modes: (1) register direct; (2) register indirect; (3) register
indirect with displacement; (4) register indirect with pre-decrement or post-increment; (5)
immediate; (6) absolute; and (7) PC-relative.
Due to the highly orthogonal nature of the instruction set, most instructions having operands can
use any applicable addressing mode from (1) through (6). The PC-relative mode (7) is used by
branching instructions.
In most instructions, the addressing mode is specified in the effective address field. The effective-
address extension, if present, contains a displacement, immediate data, or an absolute address.
Table 3-7 indicates how the addressing mode is specified in the effective address field.
45