DM9601E ETC1 [List of Unclassifed Manufacturers], DM9601E Datasheet - Page 22

• Manufacturer Part Number: DM9601E
• Description: USB Ethernet MAC Controller with Intergrated 10/100 PHY
• Manufacturer: ETC1 [List of Unclassifed Manufacturers]

10.8 Receive Overflow Counter Register ( 07H )
10.9 Back Pressure Threshold Register (08H)
10.10 Flow Control Threshold Register ( 09H )
22
Bit
6:0
7:4
3:0
7:4
3:0
Bit
Bit
7
1
0
RXFU
Name
ROC
HWOT
BPHW
LWOT
Name
Name
FOE
JPT
CE
Default
3h, RW
7h, RW
3h, RW
8h, RW
0,R/C
0,R/C
Default
Default
0,RO
0,RO
CRC Error
It is set to indicate that the received frame ends with a CRC error.
FIFO Overflow Error
It is set to indicate that a FIFO Overflow error happens during the frame reception.
Receive Overflow Counter Overflow
This bit is set when the ROC has an overflow condition.
Receive Overflow Counter
This is a statistic counter, which indicates that the received packet count upon FIFO
overflow
Back Pressure High Water Overflow Threshold
MAC will generate the jam pattern when RX SRAM free space is lower than this
threshold value
Default is 3K-byte free space. Please don’t exceed SRAM size (1 unit=1K bytes)
Jam Pattern Time Default is 200us
bit3 bit2 bit1 bit0
RX FIFO High Water Overflow Threshold
Send a pause packet with pause_time=FFFFH when the RX RAM free space is
less than this value., If this value is zero, its meaning is no free RX SARM space.
Default is 3K-byte free space. Please don’t exceed SRAM size.
(1 unit=1K bytes)
RX FIFO Low Water Overflow Threshold
Send a pause packet with pause_time=0000 when RX SARM free space is larger
than this value. This pause packet is enabled after high water pause packet is
transmitted. Default SRAM free space is 8K-byte. Please don’t exceed SRAM size.
(1 unit=1K bytes)
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
USB to Ethernet MAC Controller with Integrated 10/100 PHY
100us
150us
200us
250us
300us
350us
400us
450us
500us
550us
600us
time
10us
15us
25us
50us
5us
Description
Description
Description
Version: DM9601-DS-F01
DM9601
June 22, 2002
Final