W25Q64DWSFIG WINBOND [Winbond], W25Q64DWSFIG Datasheet - Page 15

• Manufacturer Part Number: W25Q64DWSFIG
• Description: 1.8V 64M-BIT SERIAL FLASH MEMORY WITH DUAL/QUAD SPI & QPI
• Manufacturer: WINBOND [Winbond]

10.1.10 Quad Enable (QE)
The Quad Enable (QE) bit is a non-volatile read/write bit in the status register (S9) that allows Quad SPI
and QPI operation. When the QE bit is set to a 0 state (factory default), the /WP pin and /HOLD are
enabled. When the QE bit is set to a 1, the Quad IO2 and IO3 pins are enabled, and /WP and /HOLD
functions are disabled.
QE bit is required to be set to a 1 before issuing an “Enable QPI (38h)” to switch the device from
Standard/Dual/Quad SPI to QPI, otherwise the command will be ignored. When the device is in QPI
mode, QE bit will remain to be 1. A “Write Status Register” command in QPI mode cannot change QE bit
from a “1” to a “0”.
WARNING: If the /WP or /HOLD pins are tied directly to the power supply or ground during
standard SPI or Dual SPI operation, the QE bit should never be set to a 1.
SECURITY REGISTER LOCK BITS
SECURITY REGISTER LOCK BITS
STATUS REGISTER PROTECT 0
STATUS REGISTER PROTECT 0
STATUS REGISTER PROTECT 1
STATUS REGISTER PROTECT 1
ERASE/WRITE IN PROGRESS
ERASE/WRITE IN PROGRESS
TOP/BOTTOM PROTECT
TOP/BOTTOM PROTECT
COMPLEMENT PROTECT
COMPLEMENT PROTECT
BLOCK PROTECT BITS
BLOCK PROTECT BITS
WRITE ENABLE LATCH
WRITE ENABLE LATCH
SECTOR PROTECT
SECTOR PROTECT
SUSPEND STATUS
SUSPEND STATUS
(non-volatile OTP)
(non-volatile OTP)
QUAD ENABLE
QUAD ENABLE
(non-volatile)
(non-volatile)
(non-volatile)
(non-volatile)
(non-volatile)
(non-volatile)
(non-volatile)
(non-volatile)
(non-volatile)
(non-volatile)
(non-volatile)
(non-volatile)
(non-volatile)
(non-volatile)
Figure 4a. Status Register-1
Figure 4b. Status Register-2
SRP0
SRP0
S7
S7
S15
S15
SUS
SUS
- 15 -
SEC
SEC
S6
S6
CMP
CMP
S14
S14
S5
S5
TB
TB
S13
S13
LB3
LB3
BP2
BP2
S4
S4
S12
S12
LB2
LB2
Publication Release Date: January 13, 2011
BP1
BP1
S3
S3
S11
S11
LB1
LB1
BP0
BP0
S2
S2
S10
S10
LB0
LB0
WEL BUSY
WEL BUSY
S1
S1
QE
QE
S9
S9
Preliminary - Revision C
W25Q64DW
SRP1
SRP1
S0
S0
S8
S8