W25Q64DWSFIG WINBOND [Winbond], W25Q64DWSFIG Datasheet - Page 47

• Manufacturer Part Number: W25Q64DWSFIG
• Description: 1.8V 64M-BIT SERIAL FLASH MEMORY WITH DUAL/QUAD SPI & QPI
• Manufacturer: WINBOND [Winbond]

10.2.24 64KB Block Erase (D8h)
The Block Erase instruction sets all memory within a specified block (64K-bytes) to the erased state of all
1s (FFh). A Write Enable instruction must be executed before the device will accept the Block Erase
Instruction (Status Register bit WEL must equal 1). The instruction is initiated by driving the /CS pin low
and shifting the instruction code “D8h” followed a 24-bit block address (A23-A0). The Block Erase
instruction sequence is shown in Figure 23a & 23b.
The /CS pin must be driven high after the eighth bit of the last byte has been latched. If this is not done
the Block Erase instruction will not be executed. After /CS is driven high, the self-timed Block Erase
instruction will commence for a time duration of t
is in progress, the Read Status Register instruction may still be accessed for checking the status of the
BUSY bit. The BUSY bit is a 1 during the Block Erase cycle and becomes a 0 when the cycle is finished
and the device is ready to accept other instructions again. After the Block Erase cycle has finished the
Write Enable Latch (WEL) bit in the Status Register is cleared to 0. The Block Erase instruction will not be
executed if the addressed page is protected by the Block Protect (CMP, SEC, TB, BP2, BP1, and BP0)
bits (see Status Register Memory Protection table).
(IO
(IO
CLK
/CS
DO
DI
0
1
)
)
Mode 3
Mode 0
*
= MSB
CLK
/CS
IO
IO
IO
IO
0
1
2
3
0
Figure 23a. 64KB Block Erase Instruction (SPI Mode)
Figure 23b. 64KB Block Erase Instruction (QPI Mode)
Mode 3
Mode 0
1
Instruction (D8h)
2
Instruction
3
0
D8h
4
1
High Impedance
BE
20
21
22
23
A23-16
- 47 -
5
2
(See AC Characteristics). While the Block Erase cycle
16
17
18
19
6
3
12
13
14
15
A15-8
7
4
23
10
11
*
8
9
8
5
22
Publication Release Date: January 13, 2011
4
5
6
7
24-Bit Address
A7-0
9
6
0
1
2
3
7
2
29
Mode 3
Mode 0
1
30
0
31
Preliminary - Revision C
W25Q64DW
Mode 3
Mode 0