W9751G6KB WINBOND [Winbond], W9751G6KB Datasheet - Page 39

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W9751G6KB

Manufacturer Part Number
W9751G6KB
Description
8M ? 4 BANKS ? 16 BIT DDR2 SDRAM
Manufacturer
WINBOND [Winbond]
Datasheet

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9.7
9.8
Notes:
1. All other pins not under test = 0 V.
2. DQ, LDQS, LDQS , UDQS, UDQS are disabled and ODT is turned off.
3. The V
4. V
5. V
6. The values of I
I
I
SYM.
V
OH(dc)
OL(dc)
0.28V.
capability to ensure V
V
V
I
OTR
I
DDQ
DDQ
OL
SYM.
OH
C
OL
IL
C
C
C
C
DCK
C
DIO
CK
Capacitance
Leakage and Output Buffer Characteristics
IO
DI
I
DDQ
= 1.7 V; V
= 1.7 V; V
Output Leakage Current
(Output disabled,
Input Leakage Current
(
Minimum Required Output Pull-up
Maximum Required Output Pull-down
Output Timing Measurement Reference Level
Output Minimum Source DC Current
Output Minimum Sink DC Current
0V
of the device under test is referenced.
OH(dc)
Input Capacitance , CLK and
Input Capacitance delta , CLK and
input Capacitance, all other input-only pins
Input Capacitance delta, all other input-only pins
Input/output Capacitance, DQ, LDM, UDM, LDQS,
Input/output Capacitance delta, DQ, LDM, UDM,
LDQS,
LDQS
OUT
OUT
V
IN
= 1.42 V. (V
= 0.28V. V
IH
and
min plus a noise margin and V
, UDQS,
LDQS
V
IOL(dc)
DD
PARAMETER
0V
)
OUT
, UDQS,
OUT
are based on the conditions given in Notes 3 and 4. They are used to test drive current
UDQS
PARAMETER
/I
V
OL
- V
OUT
must be less than 21 Ω for values of V
DDQ
UDQS
)/I
V
OH
DDQ
CLK
must be less than 21 Ω for values of V
)
IL
max minus a noise margin are delivered to an SSTL_18 receiver.
CLK
- 39 -
V
0.5 x VDDQ
TT
MIN.
-13.4
13.4
+ 0.603
-2
-5
Publication Release Date: Dec. 09, 2011
OUT
MIN.
1.0
1.0
2.5
V
between 0 V and 0.28V.
TT
MAX.
- 0.603
OUT
2
5
between V
W9751G6KB
MAX.
0.25
0.25
2.0
2.0
3.5
0.5
UNIT
mA
mA
µA
µA
V
V
V
DDQ
and V
Revision A01
NOTES
UNIT
4, 6
5, 6
DDQ
1
2
3
pF
pF
pF
pF
pF
pF
-

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