PSD813F1 STMICROELECTRONICS [STMicroelectronics], PSD813F1 Datasheet - Page 23

• Manufacturer Part Number: PSD813F1
• Description: Flash In-System Programmable ISP Peripherals For 8-bit MCUs
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

Preliminary
The
PSD813F1
Functional
Blocks
(cont.)
9.1.1.4 Power Down Instruction and Power Up Condition
9.1.1.4.1 EEPROM Power Down Instruction
The EEPROM can enter power down mode with the help of the EEPROM power down
instruction (see Table 9). Once the EEPROM power down instruction is decoded, the
EEPROM memory cannot be accessed unless a Return instruction (also in Table 9) is
decoded. Alternately, this power down mode will automatically occur when the APD circuit
is triggered (see section 9.5.1). Therefore, this instruction is not required if the APD circuit is
used.
9.1.1.4.2 Power-Up Condition
The PSD813F1 internal logic is reset upon power-up to the read array mode. Any write
operation to the EEPROM is inhibited during the first 5 msec following power-up. The FSi
and EESi select signals, along with the write strobe signal, must be in the false state during
power-up for maximum security of the data contents and to remove the possibility of a byte
being written on the first edge of a write strobe signal. Any write cycle initiation is locked
when V
9.1.1.5 Read
Under typical conditions, the microcontroller may read the Flash or EEPROM memory
using read operations just as it would a ROM or RAM device. Alternately, the microcontoller
may use read operations to obtain status information about a program or erase operation in
progress. Lastly, the microcontroller may use instructions to read special data from these
memories. The following sections describe these read functions.
9.1.1.5.1 Read the Contents of Memory
Main Flash is placed in the read array mode after power-up, chip reset, or a Reset Flash
instruction (see Table 9). The microcontroller can read the memory contents of main
Flash or EEPROM by using read operations any time the read operation is not part of an
instruction sequence.
9.1.1.5.2 Read the Main Flash Memory Identifier
The main Flash memory identifier is read with an instruction composed of 4 operations:
3 specific write operations and a read operation (see Table 9). During the read operation,
address bits A6, A1, and A0 must be 0,0,1, respectively, and the appropriate sector select
signal (FSi) must be active. The Flash ID is E3h for the PSD813F1. The MCU can read the
ID only when it is executing from the EEPROM.
9.1.1.5.3 Read the Main Flash Memory Sector Protection Status
The main Flash memory sector protection status is read with an instruction composed of 4
operations: 3 specific write operations and a read operation (see Table 9). During the read
operation, address bits A6, A1, and A0 must be 0,1,0, respectively, while the chip select FSi
designates the Flash sector whose protection has to be verified. The read operation will
produce 01h if the Flash sector is protected, or 00h if the sector is not protected.
The sector protection status for all NVM blocks (main Flash or EEPROM) can be read by
the microcontroller accessing the Flash Protection and PSD/EE Protection registers in PSD
I/O space. See section 9.1.1.9.1 for register definitions.
CC
is below VLKO.
PSD813F1-A
19