CY14E256LA CYPRESS [Cypress Semiconductor], CY14E256LA Datasheet - Page 14

• Manufacturer Part Number: CY14E256LA
• Manufacturer: CYPRESS [Cypress Semiconductor]

Document Number: 001-54952 Rev. *F
Hardware STORE Cycle
Switching Waveforms
t
t
t
Notes
DHSB
PHSB
SS
30. This is the amount of time it takes to take action on a soft sequence command. Vcc power must remain HIGH to effectively register command.
31. Commands such as STORE and RECALL lock out I/O until operation is complete which further increases this time. See the specific command.
32. If an SRAM write has not taken place since the last nonvolatile cycle, no AutoStore or Hardware STORE takes place.
[30, 31]
Parameter
Write Latch set
HSB (IN)
HSB (OUT)
SO
RWI
Write Latch not set
HSB (IN)
HSB (OUT)
RWI
Address
V
CE
CC
Address #1
t
SA
HSB to output active time when write latch not set
Hardware STORE pulse width
Soft sequence processing time
t DELAY
t DELAY
t PHSB
Soft Sequence
t PHSB
Command
Figure 12. Soft Sequence Processing
Figure 11. Hardware STORE Cycle
Address #6
t DHSB
t
CW
Description
t
SS
t STORE
t DHSB
Address #1
Soft Sequence
Command
HSB pin is driven high to V
100 K resistor, HSB driver is disabled
SRAM is disabled as long as HSB (IN) is driven LOW.
[32]
[30, 31]
Address #6
t
CW
t LZHSB
t HHHD
t
SS
Min
CCQ
CY14E256LA
15
–
–
only by Internal
CY14E256LA
Max
100
25
–
Page 14 of 19
Unit
ns
ns
μs
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