HYB18T512160AC-37 INFINEON [Infineon Technologies AG], HYB18T512160AC-37 Datasheet - Page 20

• Manufacturer Part Number: HYB18T512160AC-37
• Description: 512-Mbit Double-Data-Rate-Two SDRAM
• Manufacturer: INFINEON [Infineon Technologies AG]

Figure 6
Notes
1. 32 Mb
2. This Functional Block Diagram is intended to
Data Sheet
10 Column External Adresses
facilitate user understanding of the operation of the
16 Organisation with 13 Row, 2 Bank and
Block Diagram 8 Mbit
Row-Address MUX
Row-Address Latch
16 I/O
& Decoder
Bank0
Read Latch
4 Internal Memory Banks
Drivers
20
3. LDM, UDM is a unidirectional signal (input only), but
Refresh Counter
Bank Control Logic
512-Mbit Double-Data-Rate-Two SDRAM
Address Register
device; it does not represent an actual circuit
implementation.
is internally loaded to match the load of the
bidirectional LDQS and UDQS signals.
HYB18T512[400/800/160]A[C/F]–[3.7/5]
Receivers
09112003-SDM9-IQ3P
Rev. 1.13, 2004-05
MPBT0060
Overview