HYB18T512160AC-37 INFINEON [Infineon Technologies AG], HYB18T512160AC-37 Datasheet - Page 72

• Manufacturer Part Number: HYB18T512160AC-37
• Description: 512-Mbit Double-Data-Rate-Two SDRAM
• Manufacturer: INFINEON [Infineon Technologies AG]

7) Timing skew due to DRAM output slew rate mis-match between DQS / DQS and associated DQ’s is included
8) DRAM output slew rate specification applies to 400, 533 and 667 MT/s speed bins.
5.4
DDR2 SDRAM output driver characteristics are defined
for full strength default operation as selected by the
EMRS(1) bits A[9:7] =’111’.
Table 30
Voltage (V)
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
Note: The driver characteristics evaluation conditions are:
1. Nominal Default 25
2. Minimum 95
3. Maximum 0
Data Sheet
in
t
DQSQ
and
Default Output V-I Characteristics
Full Strength Default Pull-up Driver Characteristics
o
t
o
C (
QHS
Pull-up Driver Current [mA]
Min.
–8.5
–12.1
–14.7
–16.4
–17.8
–18.6
–19.0
–19.3
–19.7
–19.9
–20.0
–20.1
–20.2
–20.3
–20.4
–20.6
—
—
C (
T
T
specification.
case)
case
o
C (Tcase), VDDQ = 1.8 V, typical process
.
),
V
V
DDQ
Figure 65
DDQ
= 1.9 V, fast–fast process
= 1.7V, slow–slow process
and
Nominal Default low
–11.1
–16.0
–20.3
–24.0
–27.2
–29.8
–31.9
–33.4
–34.6
–35.5
–36.2
–36.8
–37.2
–37.7
–38.0
–38.4
–38.6
—
Figure 66
72
show the driver characteristics graphically and the
tables show the same data suitable for input into
simulation tools.
512-Mbit Double-Data-Rate-Two SDRAM
HYB18T512[400/800/160]A[C/F]–[3.7/5]
Nominal Default high
–11.8
–17.0
–22.2
–27.5
–32.4
–36.9
–40.8
–44.5
–47.7
–50.4
–52.5
–54.2
–55.9
–57.1
–58.4
–59.6
–60.8
—
AC & DC Operating Conditions
09112003-SDM9-IQ3P
Max.
–15.9
–23.8
–31.8
–39.7
–47.7
–55.0
–62.3
–69.4
–75.3
–80.5
–84.6
–87.7
–90.8
–92.9
–94.9
–97.0
–99.1
–101.1
Rev. 1.13, 2004-05