XCF16PVO48C XILINX [Xilinx, Inc], XCF16PVO48C Datasheet - Page 19

• Manufacturer Part Number: XCF16PVO48C
• Description: Platform Flash In-System Programmable Configuration PROMs
• Manufacturer: XILINX [Xilinx, Inc]

DS123 (v2.11.1) March 30, 2007
Product Specification
TMS
TDO
TCK
TDI
V
CCJ
R
V
CCO
V
CCINT
Notes:
1 For Mode pin connections and DONE pin pull-up value, refer to the appropriate FPGA data sheet or FPGA family
2 For compatible voltages, refer to the appropriate data sheet.
3 CS_B (or CS) and RDWR_B (or WRITE) must be either driven Low or pulled down exernally. One option is shown.
4 The BUSY pin is only available with the XCFxxP Platform Flash PROM (only certain FPGA families require the BUSY
5 For the XCFxxP the CF pin is a bidirectional pin. For the XCFxxP, if CF is not connected to PROG_B, then it must be
V
V
V
TDI
TMS
TCK
GND
CCINT
CCO
CCJ
configuration user guide.
pin connection for high-frequency SelectMAP mode configuration). For FPGAs that do not have a BUSY pin or do not
use their BUSY pin during configuration, the Platform Flash PROM BUSY pin should be unconnected or grounded.
For BUSY pin requirements, refer to the appropriate FPGA data sheet or FPGA family configuration user guide.
tied to V
XCFxxP
Platform Flash
PROM
(2)
(2)
CCO
OE/RESET
via a 4.7 kΩ pull-up resistor.
BUSY
Figure 9: Configuring in Master SelectMAP Mode
D[0:7]
CF
CEO
TDO
CLK
CE
(5)
(4)
V
CCO
(2)
www.xilinx.com
Platform Flash In-System Programmable Configuration PROMs
(1)
D[0:7]
CCLK
DONE
INIT_B
PROG_B
BUSY
TDI
TMS
TCK
GND
Xilinx FPGA
Master SelectMAP
(4)
MODE PINS
RDWR_B
CS_B
TDO
(1)
PROG_B
BUSY
INIT_B
1KΩ
DONE
D[0:7]
CCLK
(4)
...OPTIONAL
Slave FPGAs
with identical
configurations
1KΩ
I/O
I/O
(3)
(3)
ds123_14_122105
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