LPC2917/01 NXP [NXP Semiconductors], LPC2917/01 Datasheet - Page 26

• Manufacturer Part Number: LPC2917/01
• Description: ARM9 microcontroller with CAN and LIN
• Manufacturer: NXP [NXP Semiconductors]

NXP Semiconductors
LPC2917_19_01_2
Preliminary data sheet
6.10.1 DMA support for peripherals
6.10 DMA controller
Usage of the idle/turn-around time (IDCY) is demonstrated In
are added between a read and a write cycle in the same external memory device.
Address pins on the device are shared with other functions. When connecting external
memories, check that the I/O pin is programmed for the correct function. Control of these
settings is handled by the SCU.
The DMA controller allows peripheral-to memory, memory-to-peripheral,
peripheral-to-peripheral, and memory-to-memory transactions. Each DMA stream
provides unidirectional serial DMA transfers for a single source and destination. For
example, a bidirectional port requires one stream for transmit and one for receives. The
source and destination areas can each be either a memory region or a peripheral, and
can be accessed through the same AHB master or one area by each master.
The DMA controls eight DMA channels with hardware prioritization. The DMA controller
interfaces to the system via two AHB bus masters, each with a full 32-bit data bus width.
DMA operations may be set up for 8-bit, 16-bit, and 32-bit data widths, and can be either
big-endian or little-endian. Incrementing or non-incrementing addressing for source and
destination are supported, as well as programmable DMA burst size. Scatter or gather
DMA is supported through the use of linked lists. This means that the source and
destination areas do not have to occupy contiguous areas of memory.
The GPDMA supports the following peripherals: SPI0/1/2 and UART0/1. The GPDMA can
access both embedded SRAM blocks (16 kB and 32 kB), both TCMs, external static
memory, and flash memory.
Fig 7.
CLK(SYS)
WE
OE
CS
A
D
WSTOEN = 2, WSTWEN = 4, WST1 = 6, WST2 = 4, IDCY = 5
Reading/writing external memory
WSTOEN
Rev. 02 — 17 June 2009
WST1
LPC2917/01; LPC2919/01
IDCY
ARM9 microcontroller with CAN and LIN
WSTWEN
Figure
WST2
7. Extra wait states
© NXP B.V. 2009. All rights reserved.
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