LPC2917/01 NXP [NXP Semiconductors], LPC2917/01 Datasheet - Page 52

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LPC2917/01

Manufacturer Part Number
LPC2917/01
Description
ARM9 microcontroller with CAN and LIN
Manufacturer
NXP [NXP Semiconductors]
Datasheet
NXP Semiconductors
LPC2917_19_01_2
Preliminary data sheet
Fig 15. Block diagram of the CGU1
BASE_ICLK0_CLK
BASE_ICLK1_CLK
6.15.3.1 Pin description
6.15.4.1 Functional description
6.15.4 Reset Generation Unit (RGU)
The CGU1 module in the LPC2917/2919/01 has the pins listed in
Table 28.
The RGU controls all internal resets.
The key features of the Reset Generation Unit (RGU) are:
Each reset output is defined as a combination of reset input sources including the external
reset input pins and internal power-on reset, see
table form a sort of cascade to provide the multiple levels of impact that a reset may have.
The combined input sources are logically OR-ed together so that activating any of the
listed reset sources causes the output to go active.
Symbol
CLK_OUT
PLL
Reset controlled individually per subsystem
Automatic reset stretching and release
Monitor function to trace resets back to source
Register write-protection mechanism to prevent unintentional resets
CLOCK GENERATION UNIT
clkout
clkout120
clkout240
CGU1 pins
(CGU1)
Direction
OUT
Rev. 02 — 17 June 2009
AHB TO DTL BRIDGE
FDIV0
LPC2917/01; LPC2919/01
Description
clock output
ARM9 microcontroller with CAN and LIN
Table
29. The first five resets listed in this
OUT
Table 27
© NXP B.V. 2009. All rights reserved.
BASE_OUT_CLK
below.
002aae266
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