STM32F103C4H6ATR STMICROELECTRONICS [STMicroelectronics], STM32F103C4H6ATR Datasheet

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STM32F103C4H6ATR

Manufacturer Part Number
STM32F103C4H6ATR
Description
Low-density performance line, ARM-based 32-bit MCU with 16 or 32 KB Flash, USB, CAN, 6 timers, 2 ADCs, 6 communication interfaces
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
Features
September 2009
32 KB Flash, USB, CAN, 6 timers, 2 ADCs, 6 communication interfaces
Core: ARM 32-bit Cortex™-M3 CPU
– 72 MHz maximum frequency,
– Single-cycle multiplication and hardware
Memories
– 16 or 32 Kbytes of Flash memory
– 6 or 10 Kbytes of SRAM
Clock, reset and supply management
– 2.0 to 3.6 V application supply and I/Os
– POR, PDR, and programmable voltage
– 4-to-16 MHz crystal oscillator
– Internal 8 MHz factory-trimmed RC
– Internal 40 kHz RC
– PLL for CPU clock
– 32 kHz oscillator for RTC with calibration
Low power
– Sleep, Stop and Standby modes
– V
2 x 12-bit, 1 µs A/D converters (up to 16
channels)
– Conversion range: 0 to 3.6 V
– Dual-sample and hold capability
– Temperature sensor
DMA
– 7-channel DMA controller
– Peripherals supported: timers, ADC, SPIs,
Up to 51 fast I/O ports
– 26/37/51 I/Os, all mappable on 16 external
1.25 DMIPS/MHz (Dhrystone 2.1)
performance at 0 wait state memory
access
division
detector (PVD)
I
interrupt vectors and almost all 5 V-tolerant
2
BAT
Cs and USARTs
Low-density performance line, ARM-based 32-bit MCU with 16 or
supply for RTC and backup registers
Doc ID 15060 Rev 3
Table 1.
STM32F103x4
STM32F103x6
VFQFPN36 (6 × 6 mm)
Reference
Debug mode
– Serial wire debug (SWD) & JTAG interfaces
6 timers
– Two 16-bit timers, each with up to 4
– 16-bit, motor control PWM timer with dead-
– 2 watchdog timers (Independent and
– SysTick timer: a 24-bit downcounter
6 communication interfaces
– 1 x I
– 2 × USARTs (ISO 7816 interface, LIN, IrDA
– 1 × SPI (18 Mbit/s)
– CAN interface (2.0B Active)
– USB 2.0 full-speed interface
CRC calculation unit, 96-bit unique ID
Packages are ECOPACK
IC/OC/PWM or pulse counter and
quadrature (incremental) encoder input
time generation and emergency stop
Window)
capability, modem control)
2
C interface (SMBus/PMBus)
Device summary
STM32F103C4, STM32F103R4,
STM32F103T4
STM32F103C6, STM32F103R6,
STM32F103T6
TFBGA64 (5 × 5 mm
STM32F103x4
STM32F103x6
Part number
®
LQFP64 (10 × 10 mm)
LQFP48 (7 × 7 mm)
www.st.com
1/80
1

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STM32F103C4H6ATR Summary of contents

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Low-density performance line, ARM-based 32-bit MCU with Flash, USB, CAN, 6 timers, 2 ADCs, 6 communication interfaces Features ■ Core: ARM 32-bit Cortex™-M3 CPU – 72 MHz maximum frequency, 1.25 DMIPS/MHz (Dhrystone 2.1) performance at 0 ...

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Contents 1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

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Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 ...

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Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

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List of tables Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

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Table 45. ADC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

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List of figures Figure 1. STM32F103xx performance line block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

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Introduction This datasheet provides the ordering information and mechanical device characteristics of the STM32F103x4 and STM32F103x6 low-density performance line microcontrollers. For more details on the whole STMicroelectronics STM32F103xx family, please refer to Section 2.2: Full compatibility throughout the The ...

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Device overview Table 2. STM32F103xx low-density device features and peripheral counts Peripheral Flash - Kbytes SRAM - Kbytes General-purpose Advanced-control SPI USART USB CAN GPIOs 12-bit synchronized ADC Number of channels CPU frequency Operating voltage Operating ...

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Figure 1. STM32F103xx performance line block diagram TRACECLK TRACED[0: SW/JTAG NJTRST JTDI JTCK/SWCLK JTMS/SWDIO JTDO as AF NRST VDDA VSSA 51AF PA[ 15:0] PB[ 15:0] PC[15:0] PD[2:0] 4 Chann els 3 co mpl. channels ETR and BKIN MOSI,MISO, ...

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Figure 2. Clock tree 8 MHz HSI HSI RC /2 PLLSRC PLLMUL ..., x16 x2, x3, x4 PLL PLLXTPRE OSC_OUT 4-16 MHz HSE OSC OSC_IN /2 /128 OSC32_IN LSE OSC LSE 32.768 kHz OSC32_OUT RTCSEL[1:0] LSI RC LSI 40 kHz ...

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... Low- and high-density devices are an extension of the STM32F103x8/B devices, they are specified in the STM32F103x4/6 and STM32F103xC/D/E datasheets, respectively. Low- density devices feature lower Flash memory and RAM capacities, less timers and peripherals. High-density devices have higher Flash memory and RAM capacities, and additional peripherals like SDIO, FSMC, I the other members of the STM32F103xx family ...

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Overview ® 2.3.1 ARM Cortex™-M3 core with embedded Flash and SRAM The ARM Cortex™-M3 processor is the latest generation of ARM processors for embedded systems. It has been developed to provide a low-cost platform that meets the needs of ...

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This hardware block provides flexible interrupt management features with minimal interrupt latency. 2.3.6 External interrupt/event controller (EXTI) The external interrupt/event controller consists of 19 edge detector lines used to generate interrupt/event requests. Each line can be independently configured to select ...

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V external reset circuit. The device features an embedded programmable voltage detector (PVD) that monitors the V /V power supply and compares it to the V DD DDA generated when V DD than the V threshold. ...

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DMA The flexible 7-channel general-purpose DMA is able to manage memory-to-memory, peripheral-to-memory and memory-to-peripheral transfers. The DMA controller supports circular buffer management avoiding the generation of interrupts when the controller reaches the end of the buffer. Each channel is ...

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Advanced-control timer (TIM1) The advanced-control timer (TIM1) can be seen as a three-phase PWM multiplexed on 6 channels. It has complementary PWM outputs with programmable inserted dead-times. It can also be seen as a complete general-purpose timer. The 4 independent ...

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SysTick timer This timer is dedicated for OS, but could also be used as a standard downcounter. It features: ● A 24-bit downcounter ● Autoreload capability ● Maskable system interrupt generation when the counter reaches 0 ● Programmable clock source ...

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GPIOs (general-purpose inputs/outputs) Each of the GPIO pins can be configured by software as output (push-pull or open-drain), as input (with or without pull-up or pull-down peripheral alternate function. Most of the GPIO pins are shared with ...

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Pinouts and pin description Figure 3. STM32F103xx performance line LQFP64 pinout PC13-TAMPER-RTC PC14-OSC32_IN PC15-OSC32_OUT PD1 OSC_OUT 20/ VBAT PD0 ...

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Figure 4. STM32F103xx performance line TFBGA64 ballout 1 2 PC14- PC13- A PB9 OSC32_IN TAMPER-RTC PC15 BAT PB8 OSC32_OUT C OSC_IN V SS_4 PB7 D OSC_OUT V DD_4 PB6 E NRST PC1 PC0 V SSA PC2 PA2 F ...

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Figure 5. STM32F103xx performance line LQFP48 pinout PC13-TAMPER-RTC Figure 6. STM32F101xx Medium-density access line VFQFPN36 pinout OSC_IN/PD0 OSC_OUT/PD1 PA0-WKUP 22/ VBAT 1 2 PC14-OSC32_IN 3 PC15-OSC32_OUT 4 PD0-OSC_IN ...

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Table 5. Low-density STM32F103xx pin definitions Pins Pin name BAT PC13-TAMPER (5) RTC PC14-OSC32_IN PC15 OSC32_OUT OSC_IN 6 6 ...

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Table 5. Low-density STM32F103xx pin definitions (continued) Pins Pin name - 25 H6 PC5 PB0 PB1 PB2 PB10 PB11 23 ...

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Table 5. Low-density STM32F103xx pin definitions (continued) Pins Pin name PD0 PD1 PD2 PB3 PB4 PB5 42 ...

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Memory mapping The memory map is shown in Figure 7. Memory map 0xFFFF FFFF 7 0xE010 0000 Cortex-M3 Internal Peripherals 0xE000 0000 6 0xC000 0000 5 0xA000 0000 4 0x8000 0000 3 0x6000 0000 2 Peripherals 0x4000 0000 1 ...

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Electrical characteristics 5.1 Parameter conditions Unless otherwise specified, all voltages are referenced to V 5.1.1 Minimum and maximum values Unless otherwise specified the minimum and maximum values are guaranteed in the worst conditions of ambient temperature, supply voltage and ...

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Figure 8. Pin loading conditions 5.1.6 Power supply scheme Figure 10. Power supply scheme 1.8-3.6V 5 × 100 × 4.7 µ µ µF ...

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Current consumption measurement Figure 11. Current consumption measurement scheme 5.2 Absolute maximum ratings Stresses above the absolute maximum ratings listed in Table 7: Current characteristics, and damage to the device. These are stress ratings only and functional operation of ...

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Table 7. Current characteristics Symbol I Total current into V VDD I Total current out of V VSS Output current sunk by any I/O and control pin I IO Output current source by any I/Os and control pin Injected current ...

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Table 9. General operating conditions (continued) Symbol Power dissipation for suffix suffix 7 Ambient temperature for 6 suffix version T A Ambient temperature for 7 suffix version T Junction temperature range J 1. ...

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Table 11. Embedded reset and power control block characteristics Symbol Programmable voltage V PVD detector level selection (2) V PVD hysteresis PVDhyst Power on/power down V POR/PDR reset threshold (2) V PDR hysteresis PDRhyst (2) T Reset temporization RSTTEMPO 1. ...

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Embedded reference voltage The parameters given in temperature and V Table 12. Embedded internal reference voltage Symbol V Internal reference voltage REFINT ADC sampling time when (1) T reading the internal reference S_vrefint voltage Internal reference voltage (2) V ...

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Table 13. Maximum current consumption in Run mode, code with data processing running from Flash Symbol Parameter Supply current Run mode 1. Based on characterization, not tested in production. 2. External clock is 8 MHz and PLL ...

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Figure 12. Typical current consumption in Run mode versus frequency (at 3 code with data processing running from RAM, peripherals enabled – 45°C 25 °C Figure 13. Typical ...

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Table 15. Maximum current consumption in Sleep mode, code running from Flash or RAM Symbol Parameter Supply current Sleep mode 1. based on characterization, tested in production External clock is 8 MHz and PLL ...

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Table 16. Typical and maximum current consumptions in Stop and Standby modes Symbol Parameter Regulator in Run mode, low-speed and high-speed internal RC oscillators and high-speed oscillator OFF (no independent watchdog) Supply current in Stop mode Regulator in Low Power ...

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Figure 15. Typical current consumption in Stop mode with regulator in Run mode versus temperature 120 100 –45 °C Figure 16. Typical current consumption in Stop mode with regulator in Low-power mode ...

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Figure 17. Typical current consumption in Standby mode versus temperature 3.3 V and 3 4.5 4 3.5 3 2.5 2 1.5 1 0.5 0 –45 °C Typical current consumption The MCU is placed under the ...

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Table 17. Typical current consumption in Run mode, code with data processing running from Flash Symbol Parameter Supply I current in DD Run mode 1. Typical values are measures Add an additional power consumption of 0.8 mA ...

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Table 18. Typical current consumption in Sleep mode, code running from Flash or RAM Symbol Parameter Conditions External clock Supply I current in DD Sleep mode Running on high speed internal RC (HSI), AHB prescaler used to reduce the frequency ...

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On-chip peripheral current consumption The current consumption of the on-chip peripherals is given in under the following conditions: ● all I/O pins are in input mode with a static value at V ● all peripherals are disabled unless otherwise mentioned ...

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Table 20. High-speed external user clock characteristics Symbol Parameter User external clock source f (1) HSE_ext frequency V OSC_IN input pin high level voltage HSEH V OSC_IN input pin low level voltage HSEL t w(HSE) OSC_IN high or low time ...

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Figure 18. High-speed external clock source AC timing diagram V HSEH 90% 10% V HSEL t r(HSE) EXTER NAL CLOCK SOURC E Figure 19. Low-speed external clock source AC timing diagram V LSEH 90% 10% V LSEL t r(LSE) EXTER ...

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Table 22. HSE 4-16 MHz oscillator characteristics Symbol Parameter f Oscillator frequency OSC_IN R Feedback resistor F Recommended load capacitance C versus equivalent serial resistance of the crystal (R i HSE driving current 2 g Oscillator transconductance m (4) t ...

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Table 23. LSE oscillator characteristics (f Symbol R Feedback resistor F Recommended load capacitance (2) C versus equivalent serial resistance of the crystal (R I LSE driving current 2 g Oscillator Transconductance m (4) t startup time SU(LSE) 1. Based ...

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High-speed internal (HSI) RC oscillator Table 24. HSI oscillator characteristics Symbol Parameter f Frequency HSI Accuracy of the HSI ACC HSI oscillator HSI oscillator (4) t su(HSI) startup time HSI oscillator power (4) I DD(HSI) consumption 3.3 ...

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Table 26. Low-power mode wakeup timings Symbol (1) t WUSLEEP (1) t WUSTOP (1) t WUSTDBY 1. The wakeup times are measured from the wakeup event to the point in which the user application code reads the first instruction. 5.3.8 ...

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Table 28. Flash memory characteristics (continued) Symbol Parameter I Supply current DD V Programming voltage prog 1. Guaranteed by design, not tested in production. Table 29. Flash memory endurance and data retention Symbol Parameter N Endurance END t Data retention ...

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Table 30. EMS characteristics Symbol Voltage limits to be applied on any I/O pin to V FESD induce a functional disturbance Fast transient voltage burst limits applied through 100 EFTB pins to induce a ...

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Absolute maximum ratings (electrical sensitivity) Based on three different tests (ESD, LU) using specific measurement methods, the device is stressed in order to determine its performance in terms of electrical sensitivity. Electrostatic discharge (ESD) Electrostatic discharges (a positive then ...

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I/O port characteristics General input/output characteristics Unless otherwise specified, the parameters given in performed under the conditions summarized in compliant. Table 34. I/O static characteristics Symbol V Input low level voltage IL Standard IO input high level voltage V ...

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Output driving current The GPIOs (general purpose input/outputs) can sink or source up to +/-8 mA, and sink +20 mA (with a relaxed the user application, the number of I/O pins which can drive current must ...

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Input/output AC characteristics The definition and values of input/output AC characteristics are given in Table 36, respectively. Unless otherwise specified, the parameters given in performed under the ambient temperature and V in Table 9. Table 36. I/O AC characteristics MODEx[1:0] ...

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Figure 22. I/O AC characteristics definition EXT ERNAL OUTPUT ON 50pF Maximum frequency is achieved 2/3)T and if the duty cycle is (45-55%) 5.3.13 NRST pin characteristics The NRST pin input driver uses ...

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Figure 23. Recommended NRST pin protection External reset circuit 2. The reset network protects the device against parasitic resets. 3. The user must ensure that the level on the NRST pin can go below the V Table 37 . Otherwise ...

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Communications interfaces interface characteristics Unless otherwise specified, the parameters given in performed under the ambient temperature, f conditions summarized in The STM32F103xx performance line communication protocol with the following restrictions: the I/O ...

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Figure 24 bus AC waveforms and measurement circuit bus S TART SDA t f(SDA) t h(STA) SCL t w(SCKH) 1. Measurement points are done at CMOS levels: 0.3V Table 40. SCL frequency (f f ...

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SPI interface characteristics Unless otherwise specified, the parameters given in performed under the ambient temperature, f conditions summarized in Table Refer to Section 5.3.12: I/O port characteristics function characteristics (NSS, SCK, MOSI, MISO). Table 41. SPI characteristics Symbol Parameter f ...

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Figure 25. SPI timing diagram - slave mode and CPHA = 0 NSS input t SU(NSS) CPHA= 0 CPOL=0 t w(SCKH) CPHA w(SCKL) CPOL=1 t a(SO) MISO OUT su(SI) MOSI I NPUT Figure 26. SPI ...

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Figure 27. SPI timing diagram - master mode High NSS input CPHA= 0 CPOL=0 CPHA= 0 CPOL=1 CPHA=1 CPOL=0 CPHA=1 CPOL=1 t w(SCKH) t su(MI) t w(SCKL) MISO MS BIN INP UT MOSI M SB OUT OUTUT t v(MO) 1. ...

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Table 43. USB DC electrical characteristics Symbol Input levels V USB operating voltage DD (4) V Differential input sensitivity DI (4) V Differential common mode range CM (4) V Single ended receiver threshold SE Output levels V Static output level ...

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ADC characteristics Unless otherwise specified, the parameters given in performed under the ambient temperature, f conditions summarized in Note recommended to perform a calibration after each power-up. Table 45. ADC characteristics Symbol Parameter V Power supply ...

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Equation 1: R max formula: AIN  R ------------------------------------------------------------- - R AIN  ADC ADC The formula above (Equation error below 1/4 of LSB. Here (from 12-bit resolution). Table 46. R max for f AIN ...

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Table 48. ADC accuracy Symbol Parameter ET Total unadjusted error EO Offset error EG Gain error ED Differential linearity error EL Integral linearity error 1. ADC DC accuracy values are measured after internal calibration. 2. Better performance ...

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Figure 30. Typical connection diagram using the ADC R AIN (1) V AIN 1. Refer to Table 45 for the values represents the capacitance of the PCB (dependent on soldering and PCB layout quality) plus the ...

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Figure 32. Power supply and reference decoupling(V 1. The V input is available only on the TFBGA64 package. REF+ 5.3.18 Temperature sensor characteristics Table 49. TS characteristics Symbol ( (1) Avg_Slope Average slope (1) Voltage at 25 ...

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Package characteristics 6.1 Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ® ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available ...

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Figure 33. VFQFPN36 mm, 0.5 mm pitch, (1) package outline Seating plane Pin # 0.20 1. Drawing is not to scale. 2. ...

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Figure 35. LQFP64 mm, 64-pin low-profile quad flat package outline Drawing is not to scale. 2. Dimensions are in millimeters. Table 51. LQFP64 mm, 64-pin low-profile quad flat package ...

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Figure 37. TFBGA64 - active ball array mm, 0.5 mm pitch, package outline Seating C plane 1. Drawing is not to scale. Table 52. TFBGA64 - ...

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Figure 38. Recommended PCB design rules for pads (0.5 mm pitch BGA) Dpad Dsm 1. Non solder mask defined (NSMD) pads are recommended mils solder paste screen printing process 72/80 0.5 mm Pitch D pad 0.27 ...

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Figure 39. LQFP48 mm, 48-pin low-profile quad flat (1) package outline Seating plane ccc Pin 1 1 identification 1. Drawing is not to scale. 2. ...

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Thermal characteristics The maximum chip junction temperature (T Table 9: General operating conditions on page The maximum chip-junction temperature, T using the following equation: Where: max is the maximum ambient temperature in C, ●  is the ...

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Selecting the product temperature range When ordering the microcontroller, the temperature range is specified in the ordering information scheme shown in Each temperature range suffix corresponds to a specific guaranteed ambient temperature at maximum dissipation and specific ...

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Using the values obtained in – For LQFP64, 45 °C 115 °C + (45 °C/W × 134 mW) = 115 °C + 6.03 °C = 121.03 °C Jmax This is within the range of the suffix 7 version ...

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Ordering information scheme Table 55. Ordering information scheme Example: Device family STM32 = ARM-based 32-bit microcontroller Product type F = general-purpose Device subfamily 103 = performance line Pin count pins pins R = ...

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Revision history Table 56. Document revision history Date Revision 22-Sep-2008 30-Mar-2009 78/80 1 Initial release. “96-bit unique ID” feature added and I/O information clarified Timers specified on page 1 Table 4: Timer feature comparison PB4, PB13, PB14, PB15, PB3/TRACESWO ...

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Table 56. Document revision history (continued) Date Revision Note 5 STM32F103xx pin V RERINT voltage. Typical I maximum current consumptions in Stop and Standby Figure 14: Typical current consumption on VBAT with RTC on versus temperature at different VBAT values ...

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Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any ...

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