STM32F103C4H6ATR STMICROELECTRONICS [STMicroelectronics], STM32F103C4H6ATR Datasheet - Page 51

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STM32F103C4H6ATR

Manufacturer Part Number
STM32F103C4H6ATR
Description
Low-density performance line, ARM-based 32-bit MCU with 16 or 32 KB Flash, USB, CAN, 6 timers, 2 ADCs, 6 communication interfaces
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
5.3.11
Absolute maximum ratings (electrical sensitivity)
Based on three different tests (ESD, LU) using specific measurement methods, the device is
stressed in order to determine its performance in terms of electrical sensitivity.
Electrostatic discharge (ESD)
Electrostatic discharges (a positive then a negative pulse separated by 1 second) are
applied to the pins of each sample according to each pin combination. The sample size
depends on the number of supply pins in the device (3 parts × (n+1) supply pins). This test
conforms to the JESD22-A114/C101 standard.
Table 32.
1. Based on characterization results, not tested in production.
Static latch-up
Two complementary static tests are required on six parts to assess the latch-up
performance:
These tests are compliant with EIA/JESD 78A IC latch-up standard.
Table 33.
V
V
Symbol
Symbol
ESD(CDM)
ESD(HBM)
LU
A supply overvoltage is applied to each power supply pin
A current injection is applied to each input, output and configurable I/O pin
Static latch-up class
Electrostatic discharge
voltage (human body model)
Electrostatic discharge
voltage (charge device
model)
ESD absolute maximum ratings
Electrical sensitivities
Parameter
Ratings
Doc ID 15060 Rev 3
T
A
+105 °C conforming to JESD78A
T
conforming to
JESD22-A114
T
conforming to
JESD22-C101
A
A
+25 °C
+25 °C
Conditions
Conditions
2
II
Class
Maximum value
2000
500
II level A
(1)
Class
Unit
51/80
V

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