STM32F103C4H6ATR STMICROELECTRONICS [STMicroelectronics], STM32F103C4H6ATR Datasheet - Page 66

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STM32F103C4H6ATR

Manufacturer Part Number
STM32F103C4H6ATR
Description
Low-density performance line, ARM-based 32-bit MCU with 16 or 32 KB Flash, USB, CAN, 6 timers, 2 ADCs, 6 communication interfaces
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
66/80
Figure 30. Typical connection diagram using the ADC
1. Refer to
2. C
General PCB design guidelines
Power supply decoupling should be performed as shown
depending on whether V
ceramic (good quality). They should be placed them as close as possible to the chip.
Figure 31. Power supply and reference decoupling (V
1. The V
pad capacitance (roughly 7 pF). A high C
this, f
parasitic
ADC
V AIN
REF+
Table 45
represents the capacitance of the PCB (dependent on soldering and PCB layout quality) plus the
should be reduced.
R AIN (1)
input is available only on the TFBGA64 package.
for the values of R
C parasitic
AINx
REF+
is connected to V
Doc ID 15060 Rev 3
AIN
V DD
, R
parasitic
ADC
0.6 V
0.6 V
V T
V T
and C
value will downgrade conversion accuracy. To remedy
ADC
I L ±1 µA
DDA
.
or not. The 10 nF capacitors should be
R ADC (1)
Sample and hold ADC
converter
inFigure 31
REF+
C ADC (1)
STM32F103xx
converter
not connected to
12-bit
or
Figure
32,
ai14150c
V
DDA
)

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