MCF5270 FREESCALE [Freescale Semiconductor, Inc], MCF5270 Datasheet - Page 16
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MCF5270
Manufacturer Part Number
MCF5270
Description
32-bit Embedded Controller Division
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
1.MCF5270.pdf
(56 pages)
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Modes of Operation
5
5.1
16
•
•
•
Chip operating mode:
— Master mode
Boot device/size:
— External device boot
Output pad strength:
Modes of Operation
Chip Configuration Mode—Device
Operating Options
– 32-bit
– 16-bit (Default)
– 8-bit
NOTES:
1
2
Signal Name
PLL_TEST
Refers to pin’s primary function. All pins which are configurable for GPIO have a pullup enabled
in GPIO mode with the exception of PBUSCTL[7], PBUSCTL[4:0], PADDR, PBS, PSDRAM.
If JTAG_EN is asserted, these pins default to Alternate 1 (JTAG) functionality. The GPIO
module is not responsible for assigning these pins.
PST[3:0]
VDDPLL
VSSPLL
Table 2. MCF5270 and MCF5271 Signal Information and Muxing (continued)
OVDD
TEST
VDD
VSS
MCF5271 Integrated Microprocessor Hardware Specification, Rev. 1.2
GPIO
—
—
—
—
—
—
—
—
Alternate 1 Alternate 2 Dir.
—
—
—
—
—
—
—
—
Power Supplies
Test
—
—
—
—
—
—
—
—
O
I
I
I
I
I
I
I
1
1, 18, 32, 41, 55,
69, 81, 94, 105,
114, 128, 138,
17, 31, 40, 54,
67, 80, 88, 93,
104, 113, 127,
137, 144, 160
16, 53, 103
MCF5270
MCF5271
160 QFP
77:74
145
19
87
84
—
E5, E7, E10, F7,
A1, A14, E6, E9,
F6, F8, F10, G7,
D6, F11, G4, L4
M11, N11, P11,
F9, G6, G8, H7,
J10, K5, K6, K8
J9, K7, P1, P14
H8, H9, J6, J8,
G9, H6, J5, J7,
196 MAPBGA
MCF5270
MCF5271
M13
Freescale Semiconductor
L10
L14
F5