HD6433935 Hitachi, HD6433935 Datasheet - Page 203
HD6433935
Manufacturer Part Number
HD6433935
Description
8-Bit MICROCONTROLLER
Manufacturer
Hitachi
Datasheet
1.HD6433935.pdf
(521 pages)
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Bits 6 and 5: Counter up/down control (TMC6, TMC5)
Selects whether TCC up/down control is performed by hardware using UD pin input, or whether
TCC functions as an up-counter or a down-counter.
Bit 6
TMC6
0
0
1
Bits 4 and 3: Reserved bits
Bits 4 and 3 are reserved; they are always read as 1 and cannot be modified.
Bits 2 to 0: Clock select (TMC2 to TMC0)
Bits 2 to 0 select the clock input to TCC. For external event counting, either the rising or falling
edge can be selected.
Bit 2
TMC2
0
0
0
0
1
1
1
1
Note: * The edge of the external event signal is selected by bit IEG1 in the IRQ edge select register
(IEGR). See 1. IRQ edge select register (IEGR) in 3.3.2 for details. IRQ2 must be set to 1
in port mode register 1 (PMR1) before setting 111 in bits TMC2 to TMC0.
Bit 1
TMC1
0
0
1
1
0
0
1
1
Bit 5
TMC5
0
1
*
Bit 0
TMC0
0
1
0
1
0
1
0
1
Description
TCC is an up-counter
TCC is a down-counter
Hardware control by UD pin input
UD pin input high: Down-counter
UD pin input low: Up-counter
Description
Internal clock: ø/8192
Internal clock: ø/2048
Internal clock: ø/512
Internal clock: ø/64
Internal clock: ø/16
Internal clock: ø/4
Internal clock: ø
External event (TMIC): rising or falling edge*
W
/4
(initial value)
(initial value)
*: Don't care
191
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